JPS648841B2 - - Google Patents

Description

[Detailed Description of the Invention] This invention allows only the user to create a program to drive a specific output element using a user command, and while the contents of the output buffer memory are constantly updated, only the signal state of each output terminal is updated. This invention relates to a programmable logic controller (hereinafter referred to as PLC) that can be set to a value independent of the contents of an output buffer memory.

For example, in a scanning type PLC, if you want to operate such that each output terminal is set to a specific state (for example, all OFF) when a certain abnormal state etc. occurs, conventionally, in response to the above abnormal state, Draw a ladder diagram in which a specific output relay (hereinafter referred to as an error relay) is operated and the B contact of this error relay is inserted in series with all other output relays, and program this using user instructions. things will be done.

When the PLC executes such a program,
With the occurrence of the abnormal state, the contents of each output buffer memory become all "0", the output interface circuit takes in the contents of each output buffer memory, and all output terminals are turned OFF.

However, if such programming is performed, at least one output relay will be dedicated as an error relay, and if the contents of the output buffer memory itself are set to "0", for example, the auxiliary contact of each output relay will be If a ladder diagram has been programmed in which timers, counters, etc. are energized through the power supply, these clocks or counting operations will also stop.

Therefore, the state of each output terminal immediately after recovery from an abnormal condition is determined based on the timing and counting contents of the timer and counter that were interrupted when the abnormal condition occurred. It is not possible to set the state of each output terminal as if it were not present.

Furthermore, as mentioned above, since the auxiliary contacts of the fault relays are inserted in series with all output relays, there are problems such as having to use at least as many extra addresses in the program memory as steps corresponding to the number of output points. be.

This invention was devised to solve the above-mentioned problem, and its purpose is to perform an operation such as setting the state of each output terminal to a specific content in response to an abnormal state, for example, in a minimum length. The objective is to provide a PLC that can be executed by a user program.

Furthermore, another object of the present invention is to set the state of each output terminal to a specific content in response to an abnormal state, for example, while always advancing the contents of the output buffer memory according to program execution. An object of the present invention is to provide a PLC that can set the state of each output terminal as if the abnormal state had never existed from the beginning upon recovery of the abnormal state.

In order to achieve the above object, the present invention provides a flag that can be set or reset by a user command, for example, in a state storage unit, and also provides a central processing unit with a flag that can be set or reset by a user command, and a central processing unit that outputs data from an output buffer memory to an output interface circuit according to the contents of the flag. The present invention is characterized by providing an output state control means for controlling data transfer to.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram showing the system configuration of a PLC according to the present invention. The input interface circuit 2, which is an interface with the central processing unit 1, takes in output data transferred from an output buffer memory (described later) via the central processing unit 1, drives the corresponding output relay, and connects this contact. Turn on the external device connected to the output terminal OUT via
an output interface circuit 3 for OFF control;
A program storage unit 4 that stores programs arbitrarily assembled by the user, a status storage unit 5 that stores each input or output, the status of flags and the running status of timers, counters, etc. according to the present invention, and the program. Key input device 6 used for setting operations etc.
It is comprised of a display 7, etc., which displays the command being set when setting a program, and the execution status when executing the program.

FIG. 2 schematically shows the internal structure of the state storage section 5. In the figure, each square has a storage capacity of 1 bit, and is addressed via a system program. and,
In the diagram, for example, _F1 is used as a status flag that is set to "1" by the system program when the battery level falls below the specified value, and _F2 is used as a status flag that is set to "1" by the system program when there is an execution error in the program. It is used as a status flag that is set to “1” by
_F3 is used as a status flag that is set to "1" only during one scan by the system program when the power is turned on. The contents of these status flags can be referenced arbitrarily by a user command via a system program. That is, for example, by specifying a specific input terminal with a user command, the contents of each status flag can be used as an input signal.

On the other hand, when a keep relay assigned a specific number is used by a user command, _F4 is used as an area where the contents corresponding to the output of the keep relay are written via the system program. That is, if the above keep relay is set to "1", the contents of _F4 are also set to "1",
Also, if it is reset to “0”, the contents of _F4 will also be “0”.
It will be reset to .

Furthermore, this flag _F4 is used as a condition flag for starting the execution of a specific system program, and in this example, when the flag _F4 is set to "1", the The system program is designed such that the contents of the output buffer memory that are not used are not transferred to the output interface circuit 3, and instead, all output bits of the output interface circuit 3 are reset to "0". Note that the output buffer memory is a memory that is updated with output data corresponding to the execution results of each user program every time a scan is performed.

In the above configuration, for example, as shown in FIG. 3, the keep relay _F4 is set by the logical sum of the contents of the condition flags _F1 and _F2 , and the push button PB is
Draw a ladder diagram in which the keep relay _F4 is reset by the logical sum of the output of and the contents of the condition flag _F3 , and program this according to a predetermined format using user instructions.

FIG. 4 is a flowchart showing the execution process of the user program. When the power is turned on, routine _R1 is executed and flag _F3 is set to "1", and then routines _R2 and _R3 are executed and the contents of the output buffer memory correspond to the execution results of the user program. and at the same time the flag
In response to _F3 being set to "1", flag _F4 is reset to "0". Next, when routine _R4 is executed, a system program for error checking is executed, and the presence or absence of a program execution error is determined based on, for example, whether the program execution has been completed within a predetermined time, and the determination result is Only in the case of YES, routine _R5 is executed and flag _F2 is set to "1". Then,
When routine _R6 is executed, a system program for voltage detection is executed to determine whether the output voltage of the battery has fallen below a specified value, for example, and if the determination result is YES, the system program for voltage detection is executed. If the routine _R7 is also NO, the routine _R8 is executed and the flag _F1 becomes "1" or "0".

Then when routine R ₉ is executed flag F ₄
A determination is made as to whether or not the flag F4 is set to "1". In this case, the flag _F4 has been reset to "0" by executing routine _R3 . Therefore, the execution result of routine R ₉ is NO, and routine R ₁₀ is executed, and the contents of the output buffer memory (not shown) are transferred to the output interface circuit 3, which is connected to each output terminal OUT according to the contents. External equipment is controlled ON and OFF.

Then when routine R ₁₁ is executed flag F ₃
The contents of will be reset to “0”, and unless a program execution error or battery error occurs from then on,
The routine R ₂ →R ³ →R ₄ →R ₆ →R ₈ →R ₉ →R ₁₀ →R ₁₁ is repeatedly executed, and each output relay is controlled ON and OFF according to the contents of the output buffer memory.

On the other hand, if a program execution error or battery error occurs, the execution result of routine R ₄ or R ₆ will be YES and routine R ₅ or R ₇ will continue.
is executed and flag _F1 or _F2 is set to "1". Therefore, in the next execution, the routine
When _R3 is executed, flag _F4 is set to "1", then the execution result of routine _R9 becomes YES and routine _R12 is executed. Then, each output data stored in the output buffer memory is prohibited from being transferred to the output interface circuit 3, and at the same time, all output bits of the output interface circuit 3 are reset to "0". As a result, the ON and OFF states of each output relay are held in the OFF state regardless of the contents of the output buffer memory thereafter. In addition, in order not to transfer the contents of the output buffer memory to the output interface circuit 3,
For example, this is done by prohibiting the latch command signal from being sent to the data latch circuit that constitutes the output interface circuit 3, and furthermore, in order to reset all output bits to "0", the latch in the output interface circuit 3 is prohibited. Each D making up the circuit
This is done by forcing a reset of the type flip-flop.

Thereafter, as described above, the output interface circuit 3
The ON/OFF state of each output relay that makes up the is OFF.
However, data in the output buffer memory is continuously updated in response to the execution of the user program by routine _R3 . In other words, assuming that timers, counters, etc. are used in the user program,
These timing or counting operations are executed as usual, and the contents of the output buffer memory are also updated in accordance with the results of these executions.

Therefore, at any given time the pushbutton switch
When PB is turned on, flag _F4 is reset to "0" by executing routine _R3 , and the execution result of routine _R9 becomes NO, and the contents of the output buffer memory are resumed being transferred to the output interface circuit 3. However, the output data transferred to the output interface circuit 3 at this time will be the same as if no program execution error or battery error had occurred, and if this is used, for example, Optimal control can be performed even in cases where a reaction progresses over time in a chemical blunt, etc., and an output device is controlled by making the reaction progress state correspond to the count output of a counter.

Furthermore, in programming this PLC, you simply draw the conditions for setting flag _F4 to "1" in a ladder diagram and create a program based on this, and the operating conditions of each output relay can be programmed. No longer needed,
Program length can be significantly reduced.

In addition, in this embodiment, the flag _F4 is "1".
We created a system program that prohibits data transfer from the output buffer memory to the output interface circuit 3 and forcibly resets the output interface circuit 3 when the output buffer memory is set to of each output relay externally in advance.
By creating output data corresponding to ON and OFF patterns and incorporating a system program that presets this data into the output interface circuit, each output relay can be configured to follow a predetermined pattern.
It can also be turned ON and OFF. Furthermore, by simply prohibiting transfer to the interface circuit 3, each output relay can be maintained in its previous operating state.

Furthermore, in this embodiment, a keep relay is used in the user command to set or reset the flag _F4 , but it goes without saying that this may be a simple external relay, or even a timer, counter, etc. Furthermore, as these operating conditions, the input signal or the auxiliary contact of the output relay may be used without using the flags F ₁ to _{F 3} and the like.

As is clear from the above description of the embodiments, the PLC according to the present invention is provided with a flag that can be set or reset by a user command, for example, in the state storage section, and the central processing unit is provided with a flag that can be set or reset according to the contents of the flag. Since it is characterized by providing an output state control means for controlling data transfer from the output buffer memory to the output interface circuit, it is possible to set the state of each output terminal to a specific content in response to an abnormal state, for example. Alternatively, it is possible to execute an operation such as holding it using a user program of minimum length, and furthermore, when the above abnormal condition is recovered, each output is treated as if the abnormal condition never existed from the beginning. It is something that can operate a relay.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the system configuration of a PLC according to the present invention, FIG. 2 is a diagram schematically showing the configuration of a state storage section, FIG. 3 is a diagram showing an example of a ladder diagram, and FIG. 4 is a diagram showing a PLC system configuration. This is a flowchart for explaining the operation. DESCRIPTION OF SYMBOLS 1...Central processing unit, 3...Output interface circuit, 4...Program storage section, 5...State storage section, _F4 ...Condition flag, _R8 , _R9 , _R11 ...System program.

Claims (1)

[Claims] 1. A programmable logic device that updates the contents of the output buffer memory with output data obtained by executing the user program each time the user program is executed, and transfers the contents of the output buffer memory to the output interface circuit each time the user program is executed. - The controller is provided with a flag that can be operated using a user command and an output state control means that prohibits the transfer of output data from the output buffer memory to the output interface circuit according to the state of this flag. A programmable logic controller characterized by: