JPS648652A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS648652A
JPS648652A JP62164345A JP16434587A JPS648652A JP S648652 A JPS648652 A JP S648652A JP 62164345 A JP62164345 A JP 62164345A JP 16434587 A JP16434587 A JP 16434587A JP S648652 A JPS648652 A JP S648652A
Authority
JP
Japan
Prior art keywords
signal
level
output
input
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62164345A
Other languages
Japanese (ja)
Inventor
Soichi Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62164345A priority Critical patent/JPS648652A/en
Publication of JPS648652A publication Critical patent/JPS648652A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Abstract

PURPOSE:To prevent hot carriers from generating and to remarkably improve reliability by supplying a power supply voltage and a signal adapted for an inner semiconductor integrated circuit chip while an input/output signal level is held at a TTL level. CONSTITUTION:When an H signal of a TTL level is input to the input terminal 31 in an input signal level converter 3, an H level signal is applied to the base of a transistor T2. Accordingly, the transistor T2 is turned ON. Thus, a power supply terminal 33 is conducted with a ground terminal, the base of a transistor T4 becomes an H level to be turned ON, and an output terminal 32 is conducted with the ground terminal, and 0 volt is output to the output terminal. When the H signal (3 volts) of an inner signal level is input to an output signal level converter 4, transistors T5, T6, T8 are turned ON, and a transistor T7 is turned OFF. Thus, an L signal (10 volts) of a TTL level is output. A signal having an inner signal level is input to or output from a semiconductor integrated circuit chip 2. That is, the voltage can be stepped down to 3/5 by the chip 2.
JP62164345A 1987-06-30 1987-06-30 Semiconductor integrated circuit device Pending JPS648652A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62164345A JPS648652A (en) 1987-06-30 1987-06-30 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62164345A JPS648652A (en) 1987-06-30 1987-06-30 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS648652A true JPS648652A (en) 1989-01-12

Family

ID=15791403

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62164345A Pending JPS648652A (en) 1987-06-30 1987-06-30 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS648652A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006080145A (en) * 2004-09-07 2006-03-23 Nec Electronics Corp Chip-on-chip semiconductor integrated circuit device
US8713635B2 (en) 2004-06-10 2014-04-29 Nec Corporation Information terminal, setting information distribution server, right information distribution server, network connection setting program and method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8713635B2 (en) 2004-06-10 2014-04-29 Nec Corporation Information terminal, setting information distribution server, right information distribution server, network connection setting program and method
JP2006080145A (en) * 2004-09-07 2006-03-23 Nec Electronics Corp Chip-on-chip semiconductor integrated circuit device

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