JPS6482305A - Signal reproducing circuit for magnetic disk device - Google Patents

Signal reproducing circuit for magnetic disk device

Info

Publication number
JPS6482305A
JPS6482305A JP23965787A JP23965787A JPS6482305A JP S6482305 A JPS6482305 A JP S6482305A JP 23965787 A JP23965787 A JP 23965787A JP 23965787 A JP23965787 A JP 23965787A JP S6482305 A JPS6482305 A JP S6482305A
Authority
JP
Japan
Prior art keywords
executing
peripheral side
circuit
gain
optimum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23965787A
Other languages
Japanese (ja)
Inventor
Chiharu Kaburagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP23965787A priority Critical patent/JPS6482305A/en
Publication of JPS6482305A publication Critical patent/JPS6482305A/en
Pending legal-status Critical Current

Links

Landscapes

  • Digital Magnetic Recording (AREA)
  • Networks Using Active Elements (AREA)

Abstract

PURPOSE:To lower the error rate of a data by always executing an optimum equalization extending from the outside peripheral side of a disk to the inside peripheral side, and suppressing a peak shift to the minimum. CONSTITUTION:The titled circuit is provided with at least one or more delay elements 2, a resistance 1 for taking the matching between the delay element 2 and a signal line, and a cosine equalizing circuit constituted of a gain control circuit 3 whose gain is varied by an external control voltage, and a differential amplifying circuit 4. In this state, a value of the gain for executing an optimum equalization is set in advance at every cylinder, and at the time of executing a read-out operation, it is controlled so as to become a value aligned with the cylinder to be read out by a control signal. In such a way, by executing an optimum cosine equalization at all times extending from the outside peripheral side of a disk to the inside peripheral side, a peak shift is suppressed to the minimum. In such a way, an error rate of a data can be lowered.
JP23965787A 1987-09-24 1987-09-24 Signal reproducing circuit for magnetic disk device Pending JPS6482305A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23965787A JPS6482305A (en) 1987-09-24 1987-09-24 Signal reproducing circuit for magnetic disk device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23965787A JPS6482305A (en) 1987-09-24 1987-09-24 Signal reproducing circuit for magnetic disk device

Publications (1)

Publication Number Publication Date
JPS6482305A true JPS6482305A (en) 1989-03-28

Family

ID=17047961

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23965787A Pending JPS6482305A (en) 1987-09-24 1987-09-24 Signal reproducing circuit for magnetic disk device

Country Status (1)

Country Link
JP (1) JPS6482305A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5266325B2 (en) * 2008-08-18 2013-08-21 日本電信電話株式会社 Vector synthesis type phase shifter, optical transceiver and control circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5266325B2 (en) * 2008-08-18 2013-08-21 日本電信電話株式会社 Vector synthesis type phase shifter, optical transceiver and control circuit
US8687968B2 (en) 2008-08-18 2014-04-01 Nippon Telegraph And Telephone Corporation Vector sum phase shifter, optical transceiver, and control circuit

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