JPS6482166A - Duplexing control system - Google Patents

Duplexing control system

Info

Publication number
JPS6482166A
JPS6482166A JP62240022A JP24002287A JPS6482166A JP S6482166 A JPS6482166 A JP S6482166A JP 62240022 A JP62240022 A JP 62240022A JP 24002287 A JP24002287 A JP 24002287A JP S6482166 A JPS6482166 A JP S6482166A
Authority
JP
Japan
Prior art keywords
importance
processor
processors
information
decentralized processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62240022A
Other languages
Japanese (ja)
Inventor
Hideo Aoyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62240022A priority Critical patent/JPS6482166A/en
Publication of JPS6482166A publication Critical patent/JPS6482166A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To avoid the interruption of the overall processing of a device caused by a system switching action by using a switch deciding means which decide whether a device including a faulty processor should be switched to a spare device or not by reference to the information on importance and in accordance with the degree of importance. CONSTITUTION:A decentralized processing system is obtained by duplexing a device which consists of plural processors 10-14 and 20-24 and performs the decentralized processing. In this system the information showing the degrees of importance of the processors 10-14 and 20-24 forming a 0-system packet exchange device 1 and a 1-system packet exchange device 2 respectively are previously stored. When either one of those processors 10-14 and 20-24 has a fault, the switch is carried out between both devices 1 and 2 only when it is decided that the faulty processor contains an important function by reference to the information on the importance of the relevant processor. Thus it is possible to avoid the interruption of the decentralized processing of a system as a whole when a processor containing no important function has a fault.
JP62240022A 1987-09-24 1987-09-24 Duplexing control system Pending JPS6482166A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62240022A JPS6482166A (en) 1987-09-24 1987-09-24 Duplexing control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62240022A JPS6482166A (en) 1987-09-24 1987-09-24 Duplexing control system

Publications (1)

Publication Number Publication Date
JPS6482166A true JPS6482166A (en) 1989-03-28

Family

ID=17053301

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62240022A Pending JPS6482166A (en) 1987-09-24 1987-09-24 Duplexing control system

Country Status (1)

Country Link
JP (1) JPS6482166A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0341524A (en) * 1989-07-07 1991-02-22 Nec Corp Hot stand-by system
JPH03219337A (en) * 1990-01-24 1991-09-26 Nec Corp Dynamic switching control system for mutual stand-by system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0341524A (en) * 1989-07-07 1991-02-22 Nec Corp Hot stand-by system
JPH03219337A (en) * 1990-01-24 1991-09-26 Nec Corp Dynamic switching control system for mutual stand-by system

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