JPS54142041A - Duplicated switching device for composite processor system - Google Patents

Duplicated switching device for composite processor system

Info

Publication number
JPS54142041A
JPS54142041A JP4782678A JP4782678A JPS54142041A JP S54142041 A JPS54142041 A JP S54142041A JP 4782678 A JP4782678 A JP 4782678A JP 4782678 A JP4782678 A JP 4782678A JP S54142041 A JPS54142041 A JP S54142041A
Authority
JP
Japan
Prior art keywords
processor
pbii
paii
pai
pbi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4782678A
Other languages
Japanese (ja)
Inventor
Shuzo Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP4782678A priority Critical patent/JPS54142041A/en
Publication of JPS54142041A publication Critical patent/JPS54142041A/en
Pending legal-status Critical Current

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  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

PURPOSE: To constitute a composite processor system of another system which is totally independent from the operation system through combination of the holding processors each other, and thus to realize the application of this processor system to the systems for the development, debug and other purposes.
CONSTITUTION: Processor group GA and GB contains two units of processors PAI and PAII plus PBI and PBII each, and these processors are combined each other via switching device SWC. The SWC possesses four switches G0, G1, G2 and G3, and G0 and G3 are turned on with G1 and G2 turned off respectively under the state shown in the figure. And integrated processor systems of two groups PAI and PBI plus PAII and PBII are obtained. Then, for instance, PAI and PBII are used for operation purpose, and PAII and PBII are applied as the development system at the system extension time respectively. In the case of the fault occurrence of the processor, the SWC is switched to turn off switch G0 and G3 with G1 and G2 turned on to secure switching to the composite processor systems of two groups comprising PAI and PBΙI plus PAII and PBI against occurrence of the fault.
COPYRIGHT: (C)1979,JPO&Japio
JP4782678A 1978-04-24 1978-04-24 Duplicated switching device for composite processor system Pending JPS54142041A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4782678A JPS54142041A (en) 1978-04-24 1978-04-24 Duplicated switching device for composite processor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4782678A JPS54142041A (en) 1978-04-24 1978-04-24 Duplicated switching device for composite processor system

Publications (1)

Publication Number Publication Date
JPS54142041A true JPS54142041A (en) 1979-11-05

Family

ID=12786147

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4782678A Pending JPS54142041A (en) 1978-04-24 1978-04-24 Duplicated switching device for composite processor system

Country Status (1)

Country Link
JP (1) JPS54142041A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61125672A (en) * 1984-11-22 1986-06-13 Mitsubishi Electric Corp Automatic switching system for hierarchically multiplexed computer system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49111523A (en) * 1973-02-22 1974-10-24
JPS5148242A (en) * 1974-10-23 1976-04-24 Hitachi Ltd
JPS5257744A (en) * 1975-11-07 1977-05-12 Hitachi Ltd Station control unit of data freeway

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49111523A (en) * 1973-02-22 1974-10-24
JPS5148242A (en) * 1974-10-23 1976-04-24 Hitachi Ltd
JPS5257744A (en) * 1975-11-07 1977-05-12 Hitachi Ltd Station control unit of data freeway

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61125672A (en) * 1984-11-22 1986-06-13 Mitsubishi Electric Corp Automatic switching system for hierarchically multiplexed computer system

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