JPS6479997A - P-rom - Google Patents

P-rom

Info

Publication number
JPS6479997A
JPS6479997A JP23775487A JP23775487A JPS6479997A JP S6479997 A JPS6479997 A JP S6479997A JP 23775487 A JP23775487 A JP 23775487A JP 23775487 A JP23775487 A JP 23775487A JP S6479997 A JPS6479997 A JP S6479997A
Authority
JP
Japan
Prior art keywords
writing
current
word wire
absorbed
reading
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23775487A
Other languages
Japanese (ja)
Inventor
Yasuro Matsuzaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP23775487A priority Critical patent/JPS6479997A/en
Publication of JPS6479997A publication Critical patent/JPS6479997A/en
Pending legal-status Critical Current

Links

Landscapes

  • Read Only Memory (AREA)

Abstract

PURPOSE:To optimize the characteristics and circuit constant of respective transistors (TR) in accordance with respective absorption current by providing, at a word wire, the TR for writing current absorption, in which the base current is controlled according to the conversion of the potential of the word wire to the prescribed potential. CONSTITUTION:A buffer TR 2 is turned on in accordance with an input address through a word driver 1, the corresponding word wire is selected, and made into the prescribed potential. Thus, into a memory cell 3 of a P-ROM connected to the selected word wire, the writing current through a writing means 4 is supplied, and the condition of the cell 3 is irreversibly changed. At the time of the writing, a TR 5 for writing current absorption to be connected with the selected word wire is turned on through a base current supplying means 6, and the writing current is absorbed. On the other hand, the reading current is absorbed by the TR 2, writing and reading currents are absorbed by the different TRs, and the respective TRs and the circuit constant can be optimized. Consequently, the switching speed can be raised at the time of the reading, and energy consumption can be reduced.
JP23775487A 1987-09-22 1987-09-22 P-rom Pending JPS6479997A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23775487A JPS6479997A (en) 1987-09-22 1987-09-22 P-rom

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23775487A JPS6479997A (en) 1987-09-22 1987-09-22 P-rom

Publications (1)

Publication Number Publication Date
JPS6479997A true JPS6479997A (en) 1989-03-24

Family

ID=17019965

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23775487A Pending JPS6479997A (en) 1987-09-22 1987-09-22 P-rom

Country Status (1)

Country Link
JP (1) JPS6479997A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007069405A1 (en) * 2005-12-16 2007-06-21 Sharp Kabushiki Kaisha Non-volatile semiconductor memory device
JP2013222474A (en) * 2012-04-13 2013-10-28 Lapis Semiconductor Co Ltd Nonvolatile memory circuit, semiconductor device, and read method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5952496A (en) * 1982-09-17 1984-03-27 Hitachi Ltd Bipolar prom
JPS60117496A (en) * 1983-11-29 1985-06-24 Nec Corp Semiconductor memory device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5952496A (en) * 1982-09-17 1984-03-27 Hitachi Ltd Bipolar prom
JPS60117496A (en) * 1983-11-29 1985-06-24 Nec Corp Semiconductor memory device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007069405A1 (en) * 2005-12-16 2007-06-21 Sharp Kabushiki Kaisha Non-volatile semiconductor memory device
US7688614B2 (en) 2005-12-16 2010-03-30 Sharp Kabushiki Kaisha Nonvolatile semiconductor memory device
JP2013222474A (en) * 2012-04-13 2013-10-28 Lapis Semiconductor Co Ltd Nonvolatile memory circuit, semiconductor device, and read method

Similar Documents

Publication Publication Date Title
EP0345065A3 (en) Memories
MY100970A (en) Semiconductor memory device
JPS6425398A (en) Semiconductor memory
EP0328458A3 (en) Semiconductor memory circuit
JPS6479997A (en) P-rom
IE893833L (en) Integrated circuit with a memory
JPS5220732A (en) Memory circuit
JPS6419593A (en) Programmable rom
JPS54162981A (en) Semiconductor integrated circuit device
EP0321847A3 (en) Semiconductor memory capable of improving data rewrite speed
JPS5616991A (en) Semicondcutor memory unit
JPS5647988A (en) Semiconductor memory device
JPS56169965A (en) Data conversion circuit
JPS5271141A (en) Word line driving circuit
JPS57208690A (en) Semiconductor storage device
JPS54149531A (en) Memory circuit
JPS5677981A (en) Memory access circuit
JPS5712481A (en) Semiconductor memory device
JPS5271139A (en) Semiconductor memory
JPS55117790A (en) Memory circuit
JPS5345134A (en) Semiconductor memory unit
JPS5730190A (en) Semiconductor storage device
JPS56114197A (en) Semiconductor memory device
JPS6439039A (en) Semiconductor integrated circuit device with gate array and memory
JPS54158829A (en) Semiconductor memory device