JPS6478561A - Digital data demodulator - Google Patents
Digital data demodulatorInfo
- Publication number
- JPS6478561A JPS6478561A JP62235570A JP23557087A JPS6478561A JP S6478561 A JPS6478561 A JP S6478561A JP 62235570 A JP62235570 A JP 62235570A JP 23557087 A JP23557087 A JP 23557087A JP S6478561 A JPS6478561 A JP S6478561A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- reference voltage
- frequency
- voltage corresponding
- detection circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
PURPOSE:To prevent an increase in data transmission error rate by detecting the center frequency of a frequency detection circuit and controlling the reference voltage for an identification decision circuit so as to be such a reference voltage corresponding to an output from said detection. CONSTITUTION:An IF signal received by an antenna, selected by a tuner, and amplified by an intermediate frequency amplification circuit is conducted to an input terminal 4, and the frequency detection circuit 1 is connected to the terminal 4. The output of the circuit 1 is connected to a comparator 5 as the identification decision circuit via an LPF 2. At the time of reception, an L signal is inputted to a transmission/reception switching signal input terminal 12, and a voltage corresponding to the center frequency fo of the circuit 1 is subjected to the F/V converter 11 of a detection circuit 10 and a transistor(TR) 15 to lead the base of a TR14, so that a voltage corresponding to said voltage appears in a load resistor 16 which is inputted to an A/D converter 17. In such a way, the reference voltage supplied to the comparator 5 is controlled, and an increase in data transmission error rate can be prevented.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62235570A JPS6478561A (en) | 1987-09-19 | 1987-09-19 | Digital data demodulator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62235570A JPS6478561A (en) | 1987-09-19 | 1987-09-19 | Digital data demodulator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6478561A true JPS6478561A (en) | 1989-03-24 |
Family
ID=16987948
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62235570A Pending JPS6478561A (en) | 1987-09-19 | 1987-09-19 | Digital data demodulator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6478561A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5277658A (en) * | 1975-12-24 | 1977-06-30 | Toshiba Corp | Fsk signal receivinng unit |
-
1987
- 1987-09-19 JP JP62235570A patent/JPS6478561A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5277658A (en) * | 1975-12-24 | 1977-06-30 | Toshiba Corp | Fsk signal receivinng unit |
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