JPS6478336A - Control system for history information memory circuit - Google Patents

Abstract

PURPOSE:To easily analyze the factors of the hang and loop states by monitoring these states in a short cycle and controlling the writing job to a history information memory circuit via two latch circuits so that the history information data including the factors of said two states can be held. CONSTITUTION:A timer 12 which produces a timing signal 106 is used together with a pending latch circuit 13 which is set when the signal 106 and a valid signal 105 are set at logic 1, and a freezing latch circuit 14 which is set when the circuit 13 is set with the signal 106 set at logic 1 and the signal 105 is set at logic 1. The state of a history information memory circuit 11 is monitored by the timer 12 in a short cycle and the writing actions are controlled by both circuits 13 and 14 to the circuit 11. Thus it is possible to obtain the data that caused an abnormal state via the circuit 11 out of the history information data obtained before detection of the abnormal states including a hang state, a loop state, etc., when these state are detected.