JPS647536U - - Google Patents
Info
- Publication number
- JPS647536U JPS647536U JP10147187U JP10147187U JPS647536U JP S647536 U JPS647536 U JP S647536U JP 10147187 U JP10147187 U JP 10147187U JP 10147187 U JP10147187 U JP 10147187U JP S647536 U JPS647536 U JP S647536U
- Authority
- JP
- Japan
- Prior art keywords
- printing
- image
- line
- stores
- print head
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000006870 function Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 1
Landscapes
- Dot-Matrix Printers And Others (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10147187U JPS647536U (no) | 1987-06-30 | 1987-06-30 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10147187U JPS647536U (no) | 1987-06-30 | 1987-06-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS647536U true JPS647536U (no) | 1989-01-17 |
Family
ID=31330497
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10147187U Pending JPS647536U (no) | 1987-06-30 | 1987-06-30 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS647536U (no) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7521761B2 (en) * | 2004-03-30 | 2009-04-21 | Fujitsu Limited | Variable layout structure for producing CMOS circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62216029A (ja) * | 1986-03-18 | 1987-09-22 | Fujitsu Ltd | 図形印刷制御方式 |
-
1987
- 1987-06-30 JP JP10147187U patent/JPS647536U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62216029A (ja) * | 1986-03-18 | 1987-09-22 | Fujitsu Ltd | 図形印刷制御方式 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7521761B2 (en) * | 2004-03-30 | 2009-04-21 | Fujitsu Limited | Variable layout structure for producing CMOS circuit |
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