JPS6472251A - Information processor - Google Patents

Information processor

Info

Publication number
JPS6472251A
JPS6472251A JP62228346A JP22834687A JPS6472251A JP S6472251 A JPS6472251 A JP S6472251A JP 62228346 A JP62228346 A JP 62228346A JP 22834687 A JP22834687 A JP 22834687A JP S6472251 A JPS6472251 A JP S6472251A
Authority
JP
Japan
Prior art keywords
editions
circuit
logical card
edition
logical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62228346A
Other languages
Japanese (ja)
Inventor
Hisao Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62228346A priority Critical patent/JPS6472251A/en
Publication of JPS6472251A publication Critical patent/JPS6472251A/en
Pending legal-status Critical Current

Links

Landscapes

  • Stored Programmes (AREA)

Abstract

PURPOSE:To easily read the number of editions of a logical card with no error by storing and displaying the number of editions of each logical card forming an information processor. CONSTITUTION:A host device 10 produces an edition number reading instruction and this signal is inputted to a microprogram control circuit 24. Thus the circuit 24 reads the number of editions stored in the edition number setting circuits 211, 221 and 231 and then the number of editions stored in an edition number setting circuit 241 of the circuit 24. The signals showing those numbers of editions are sent to the device 10 for control carried out at the center. At the same time, those signals are also outputted to a maintenance panel 25 for display. The panel 25 receives the signals showing the number of editions of each logical card from the circuit 24 and displays these number of editions via the liquid crystal display element. Thus, a maintenance operator can easily know the number of editions of each logical card and then control properly those logical cards.
JP62228346A 1987-09-14 1987-09-14 Information processor Pending JPS6472251A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62228346A JPS6472251A (en) 1987-09-14 1987-09-14 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62228346A JPS6472251A (en) 1987-09-14 1987-09-14 Information processor

Publications (1)

Publication Number Publication Date
JPS6472251A true JPS6472251A (en) 1989-03-17

Family

ID=16875024

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62228346A Pending JPS6472251A (en) 1987-09-14 1987-09-14 Information processor

Country Status (1)

Country Link
JP (1) JPS6472251A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04322349A (en) * 1991-04-23 1992-11-12 Nec Corp Method and device for revision history recognition of input/output control card
JPH0566930A (en) * 1991-09-09 1993-03-19 Nec Corp Hardware revision controller

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04322349A (en) * 1991-04-23 1992-11-12 Nec Corp Method and device for revision history recognition of input/output control card
JPH0566930A (en) * 1991-09-09 1993-03-19 Nec Corp Hardware revision controller

Similar Documents

Publication Publication Date Title
US4424567A (en) Electronic cash register with timekeeper
JPS6472251A (en) Information processor
DE3789978T2 (en) Control circuit for a liquid crystal display.
JPS5481052A (en) Operation support system of data processor
JPS6420876A (en) Display apparatus of pinball stand
DE69019851D1 (en) Video signal processing circuit for a liquid crystal color display device.
JPS5644887A (en) Dot matrix electronic clock
JPH0765909B2 (en) Weighing value display method
ATE159828T1 (en) SYSTEM FOR CONTROLLING AND/OR RECORDING AND/OR DISPLAYING ELAPSED TIME AND/OR SEQUENCE EVENTS
FR2457517B1 (en) ELECTRONIC WATCH EQUIPPED WITH A LIQUID CRYSTAL DISPLAY DEVICE
JPS54118143A (en) Automatic transaction device
JPS54137943A (en) Electronic cash register
JPS6428793A (en) Portable electronic device system
SU1571642A1 (en) Device for training control system operators
JPS5592914A (en) Control system for pattern number and number of board
JPS57199071A (en) Memorandum device
JPS5685173A (en) Miniature electronic apparatus
JPS5663256A (en) Liquid chromatograph
JPH0594172A (en) Character display device
JPS55153060A (en) Electronic computer
JPH03114787A (en) Card with display discriminating one unit information
CH609198GA3 (en) Circuit arrangement for the drive-level display of signal amplifiers for clock control units
FR2475766B1 (en)
JPS6356696A (en) Display device
JPS57125875A (en) Electronic clock circuit