JPS6467035A - Cmi coding circuit - Google Patents

Abstract

PURPOSE:To use an inexpensive IC and to attain a stable action by using a clock having a period which is a 1/2 of the bit rate of data when making a high-speed CMI (CODED MARK INVERSION) code. CONSTITUTION:By using a first clock having the period which is a 1/2 of the bit rate of the datum, a first two-pulse-width reducing circuit 10 to sample a '1' by a first clock signal when a datum input is the '1' and to make it into a datum of the width of a 1/2 bit is provided. The titled circuit is the one that consists of a first circuit block, a second two-pulse-width reducing circuit 19 to sample a '0' by the first clock signal when the datum input is the '0' and to make it into the datum of the width of a 1/2 bit, and a second circuit block and that obtains the CMI code by the OR of the first and second circuit block. Thus, when making the high-speed CMI, the clock having the period of a 1/2 of the bit rate of the datum is used and therefore, the action can be stabilized.