JPS6461182A - Still picture reproducing device - Google Patents

Abstract

PURPOSE:To reproduce recording information without error without increasing a signal line by decoding recording information in the timing of a synchronizing signal included in the field video signal when the field video signal not retarded is outputted. CONSTITUTION:Vertical and horizontal synchronizing signals VSYNC, HSYNC in a field video signal are separated respectively by separation circuits 40, 46. A monostable multivibrator (MM) 42 is triggered by the signal VSYNC and a switch 36 is switched to the position of 1/2 frequency divider 33 for a prescribed time by the output. In this case, when the output of the frequency divider 33 is at 'H', an enable signal generating circuit 44 is in the operating state and a 'H' signal is fed to a decoder 38. When the output of the MM 42 is at 'L', the switch 36 is changed over and recording information is fed to the decoder 38 from a demodulation circuit 34 and the recording information is extracted at an output terminal 39 in the timing of an odd number order of the HSYNC with respect to the VSYNC. When the output of the frequency divider 33 is at 'L', the recording information decoded precedingly is outputted from the decoder 38.