JPS6457548U - - Google Patents

Info

Publication number
JPS6457548U
JPS6457548U JP15063287U JP15063287U JPS6457548U JP S6457548 U JPS6457548 U JP S6457548U JP 15063287 U JP15063287 U JP 15063287U JP 15063287 U JP15063287 U JP 15063287U JP S6457548 U JPS6457548 U JP S6457548U
Authority
JP
Japan
Prior art keywords
data
address
memory
processing unit
central processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15063287U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15063287U priority Critical patent/JPS6457548U/ja
Publication of JPS6457548U publication Critical patent/JPS6457548U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Image Input (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の一実施例を示す構成図、第
2図はこの考案におけるスタートアドレス/エン
ドアドレス決定方法の説明図、第3図は従来のメ
モリ装置を示す構成図である。 図において、1はメモリ、2は中央演算装置、
3はアドレス変換器、4はメモリドライバである
。なお、図中同一符号は同一または相当部分を示
す。
FIG. 1 is a block diagram showing an embodiment of this invention, FIG. 2 is an explanatory diagram of a start address/end address determining method in this invention, and FIG. 3 is a block diagram showing a conventional memory device. In the figure, 1 is a memory, 2 is a central processing unit,
3 is an address converter, and 4 is a memory driver. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] データアドレスの変換係数を中央処理装置より
入力して、連続する出力データに対応する連続す
る入力データのスタートアドレスとエンドアドレ
スを求めるアドレス変換器、上記スタートアドレ
スとエンドアドレス間のデータをベクトルデータ
としてメモリから連続して取り出し上記中央処理
装置へ転送するメモリドライバとを備えたことを
特徴とするメモリ装置。
An address converter that inputs data address conversion coefficients from the central processing unit and calculates the start address and end address of continuous input data corresponding to continuous output data, and converts the data between the start address and end address into vector data. A memory device characterized by comprising: a memory driver that successively retrieves data from the memory and transfers the data to the central processing unit.
JP15063287U 1987-10-01 1987-10-01 Pending JPS6457548U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15063287U JPS6457548U (en) 1987-10-01 1987-10-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15063287U JPS6457548U (en) 1987-10-01 1987-10-01

Publications (1)

Publication Number Publication Date
JPS6457548U true JPS6457548U (en) 1989-04-10

Family

ID=31423948

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15063287U Pending JPS6457548U (en) 1987-10-01 1987-10-01

Country Status (1)

Country Link
JP (1) JPS6457548U (en)

Similar Documents

Publication Publication Date Title
JPS6457548U (en)
JPS6421405U (en)
JPS60183812U (en) Observation value estimation device
JPS6168400U (en)
JPS58167903U (en) Sequence controller input/output device
JPS5999514U (en) signal generator
JPH01169879U (en)
JPS62112742U (en)
JPS6223347U (en)
JPS6261544U (en)
JPH03113561U (en)
JPS63103133U (en)
JPS629849U (en)
JPS62104581U (en)
JPH0186334U (en)
JPS6392439U (en)
JPS62134148U (en)
JPS6230428U (en)
JPS6419184U (en)
JPS6434700U (en)
JPS61180338U (en)
JPH02145861U (en)
JPS63171843U (en)
JPH0224669U (en)
JPS6316328U (en)