JPS6453499A - Multilayer printed wiring board and inspection of same - Google Patents
Multilayer printed wiring board and inspection of sameInfo
- Publication number
- JPS6453499A JPS6453499A JP27515087A JP27515087A JPS6453499A JP S6453499 A JPS6453499 A JP S6453499A JP 27515087 A JP27515087 A JP 27515087A JP 27515087 A JP27515087 A JP 27515087A JP S6453499 A JPS6453499 A JP S6453499A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- central
- hole
- hole part
- peripheral
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
PURPOSE:To enable deviation to be detected without damaging a completed product, by forming a plurality of central through hole parts for detecting deviation in external-layer and inner-layer plates, and a plurality of peripheral through hole parts around control ones the, deviation detection conductors, etc., with diameters different from each other. CONSTITUTION:A plurality of central through hole parts 5 and a plurality of peripheral through hole parts 6 are provided in a first external-layer plate 1. An inner-layer central through hole part 7, inner-layer peripheral through hole part 8, and a T-shape deviation detecting conductor 9 which are connected to them are provided to a first inner-layer plate 2. An inner-layer center through hole part 7a and inner-layer peripheral through hole part 8a are provided in a second inner-layer plate 2a. A central through hole part 5a and peripheral through hole part 6a are provided in a second external-layer plate 1a. If the inner-layer central through hole part 7 deviates from the central through hole parts 5, the inner wall conductor of the central through hole parts 5 deviates and is brought into contact with one of detection conductors 9, thus resulting into a continuity state. Thus, it can be detected by a conduction inspection jig, etc.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27515087A JPS6453499A (en) | 1986-12-15 | 1987-10-29 | Multilayer printed wiring board and inspection of same |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19330386 | 1986-12-15 | ||
| JP27515087A JPS6453499A (en) | 1986-12-15 | 1987-10-29 | Multilayer printed wiring board and inspection of same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6453499A true JPS6453499A (en) | 1989-03-01 |
Family
ID=26507798
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27515087A Pending JPS6453499A (en) | 1986-12-15 | 1987-10-29 | Multilayer printed wiring board and inspection of same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6453499A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008532295A (en) * | 2005-03-01 | 2008-08-14 | アーテー・ウント・エス・オーストリア・テヒノロギー・ウント・ジュステームテッヒニク・アクチェンゲゼルシャフト | Multilayer printed circuit board having conductive test area and method for measuring misalignment of intermediate layer |
| JP2009147397A (en) * | 2007-02-01 | 2009-07-02 | Panasonic Corp | Inspection mark structure, substrate sheet laminate, multilayer circuit board, method of inspecting lamination matching precision of multilayer circuit board, and method of designing substrate sheet laminate |
-
1987
- 1987-10-29 JP JP27515087A patent/JPS6453499A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008532295A (en) * | 2005-03-01 | 2008-08-14 | アーテー・ウント・エス・オーストリア・テヒノロギー・ウント・ジュステームテッヒニク・アクチェンゲゼルシャフト | Multilayer printed circuit board having conductive test area and method for measuring misalignment of intermediate layer |
| KR101234145B1 (en) * | 2005-03-01 | 2013-02-18 | 에이티 앤 에스 오스트리아 테크놀로지 앤 시스템테크니크 악치엔게젤샤프트 | Multi-layered printed circuit board comprising conductive test surfaces, and method for determining a misalignment of an inner layer |
| US20140034368A1 (en) * | 2005-03-01 | 2014-02-06 | At & S Austria Technologie & Systemtechnik Aktiengesellschaft | Multi-layered printed circuit board with conductive test areas as well as method for determining a misalignment of an inner layer |
| JP2009147397A (en) * | 2007-02-01 | 2009-07-02 | Panasonic Corp | Inspection mark structure, substrate sheet laminate, multilayer circuit board, method of inspecting lamination matching precision of multilayer circuit board, and method of designing substrate sheet laminate |
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