JPS6453181A - Video display circuit for radar indicator - Google Patents

Video display circuit for radar indicator

Info

Publication number
JPS6453181A
JPS6453181A JP20975187A JP20975187A JPS6453181A JP S6453181 A JPS6453181 A JP S6453181A JP 20975187 A JP20975187 A JP 20975187A JP 20975187 A JP20975187 A JP 20975187A JP S6453181 A JPS6453181 A JP S6453181A
Authority
JP
Japan
Prior art keywords
display
crt
diameter
sweep
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20975187A
Other languages
Japanese (ja)
Inventor
Kazuhide Kusumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP20975187A priority Critical patent/JPS6453181A/en
Publication of JPS6453181A publication Critical patent/JPS6453181A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a time frame for digital display at a minimum by setting the number of memory cells to a fixed value of CRT diameter required for display, using a memory read clock faster than a write clock, and setting a sweep display range of CRT-diameter for processing. CONSTITUTION:Memory cells per CRT-diameter are made constant and the sampling clock period at the time of writing is made proportional to a display range; when a sweep center is beyond the CRT effective diameter, only a mask area corresponding to the part within the CRT effective diameter is stored and when it is read, a sweep of the area is generated not from a range '0', but directly and the read clock is made faster than the write clock. Consequently, a radar video display time is shortened and the processing time for the display display of a large number of alphanumeric data, etc., can be secured.
JP20975187A 1987-08-24 1987-08-24 Video display circuit for radar indicator Pending JPS6453181A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20975187A JPS6453181A (en) 1987-08-24 1987-08-24 Video display circuit for radar indicator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20975187A JPS6453181A (en) 1987-08-24 1987-08-24 Video display circuit for radar indicator

Publications (1)

Publication Number Publication Date
JPS6453181A true JPS6453181A (en) 1989-03-01

Family

ID=16578030

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20975187A Pending JPS6453181A (en) 1987-08-24 1987-08-24 Video display circuit for radar indicator

Country Status (1)

Country Link
JP (1) JPS6453181A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0368886A (en) * 1989-08-07 1991-03-25 Mitsubishi Electric Corp Radar scanning converting apparatus

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57108775A (en) * 1980-12-26 1982-07-06 Toshiba Corp A/n radar display system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57108775A (en) * 1980-12-26 1982-07-06 Toshiba Corp A/n radar display system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0368886A (en) * 1989-08-07 1991-03-25 Mitsubishi Electric Corp Radar scanning converting apparatus

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