JPS57164653A - Clock control system for automatic exchange - Google Patents

Clock control system for automatic exchange

Info

Publication number
JPS57164653A
JPS57164653A JP4976781A JP4976781A JPS57164653A JP S57164653 A JPS57164653 A JP S57164653A JP 4976781 A JP4976781 A JP 4976781A JP 4976781 A JP4976781 A JP 4976781A JP S57164653 A JPS57164653 A JP S57164653A
Authority
JP
Japan
Prior art keywords
data
circuit
processor
information
charging
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4976781A
Other languages
Japanese (ja)
Other versions
JPH0154898B2 (en
Inventor
Kunihiko Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4976781A priority Critical patent/JPS57164653A/en
Publication of JPS57164653A publication Critical patent/JPS57164653A/en
Publication of JPH0154898B2 publication Critical patent/JPH0154898B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M15/00—Arrangements for metering, time-control or time indication ; Metering, charging or billing arrangements for voice wireline or wireless communications, e.g. VoIP

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Meter Arrangements (AREA)

Abstract

PURPOSE:To make it unnecessary to provide a clock circuit in an external data processing device, by adding clock information to charging data in the interface circuit of an automatic exchange and transferring this information to the external data processing device. CONSTITUTION:Charging data generated in an automatic exchange 1 is arranged in a constant data format by a charging data gathering processor 2 and is sent to an interface circuit 3. In the circuit 3, charging data is read out from an input buffer register 4 by a processor 6 and is stored in a memory 5. The processor 6 discriminates divisions of set data; and the processor 6 reads out information from a clock circuit 7 when a series of data is arranged. The time of the circuit 7 includes the year, the month, the day of the week, the data, hours, minutes, and seconds, and respective information are displayed on a display circuit 8. The processor 6 adds clock information from the circuit 7 to charging data stored in the memory 5 in accordance with a constant format and writes data in an output buffer register 10 and transfers this data to an external data processing device in a constant speed.
JP4976781A 1981-04-02 1981-04-02 Clock control system for automatic exchange Granted JPS57164653A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4976781A JPS57164653A (en) 1981-04-02 1981-04-02 Clock control system for automatic exchange

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4976781A JPS57164653A (en) 1981-04-02 1981-04-02 Clock control system for automatic exchange

Publications (2)

Publication Number Publication Date
JPS57164653A true JPS57164653A (en) 1982-10-09
JPH0154898B2 JPH0154898B2 (en) 1989-11-21

Family

ID=12840318

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4976781A Granted JPS57164653A (en) 1981-04-02 1981-04-02 Clock control system for automatic exchange

Country Status (1)

Country Link
JP (1) JPS57164653A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125155A (en) * 1983-01-04 1984-07-19 Nec Corp Transfer system of charging data
JPH0537805U (en) * 1991-10-14 1993-05-21 株式会社三協精機製作所 Card storage device for card stacks

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4852110A (en) * 1971-10-30 1973-07-21

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4852110A (en) * 1971-10-30 1973-07-21

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125155A (en) * 1983-01-04 1984-07-19 Nec Corp Transfer system of charging data
JPH0537805U (en) * 1991-10-14 1993-05-21 株式会社三協精機製作所 Card storage device for card stacks

Also Published As

Publication number Publication date
JPH0154898B2 (en) 1989-11-21

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