JPS6451649A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS6451649A
JPS6451649A JP62208143A JP20814387A JPS6451649A JP S6451649 A JPS6451649 A JP S6451649A JP 62208143 A JP62208143 A JP 62208143A JP 20814387 A JP20814387 A JP 20814387A JP S6451649 A JPS6451649 A JP S6451649A
Authority
JP
Japan
Prior art keywords
ground terminal
mosq1
aluminum wiring
source
gnd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62208143A
Other languages
Japanese (ja)
Inventor
Masato Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi ULSI Engineering Corp
Hitachi Ltd
Original Assignee
Hitachi ULSI Engineering Corp
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi ULSI Engineering Corp, Hitachi Ltd filed Critical Hitachi ULSI Engineering Corp
Priority to JP62208143A priority Critical patent/JPS6451649A/en
Publication of JPS6451649A publication Critical patent/JPS6451649A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the generation of defects such as fusion, etc., of an aluminum wiring resulting from reverse insertion by interposing a switching transistor or a current suppressing means such as a high resistance element between a source terminal for a P-MOS connected to a ground terminal and the ground terminal. CONSTITUTION:A diffusion resistor RN consisting of an N<+> diffusion layer 8 being formed on a substrate surface on the outside of an N well region near a P-MOSQ1 and having a resistance value of approximately 500OMEGA is connected to a ground terminal (GND) while being connected to a source region 3a in the P-MOSQ1 through an aluminum wiring (l), thus largely reducing currents flowing into a source in the P-MOSQ1 by the high resistance element RN even when a package is inserted reversely and supply voltage Vcc is applied to the ground terminal (GND). Accordingly, the aluminum wiring (a ground line) is not fused.
JP62208143A 1987-08-24 1987-08-24 Semiconductor integrated circuit device Pending JPS6451649A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62208143A JPS6451649A (en) 1987-08-24 1987-08-24 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62208143A JPS6451649A (en) 1987-08-24 1987-08-24 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6451649A true JPS6451649A (en) 1989-02-27

Family

ID=16551348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62208143A Pending JPS6451649A (en) 1987-08-24 1987-08-24 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6451649A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5910674A (en) * 1994-08-29 1999-06-08 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit device and method of fabricating the same
JP2006245740A (en) * 2005-03-01 2006-09-14 Sanyo Electric Co Ltd Amplifier circuit and electret condenser microphone using same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5910674A (en) * 1994-08-29 1999-06-08 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit device and method of fabricating the same
JP2006245740A (en) * 2005-03-01 2006-09-14 Sanyo Electric Co Ltd Amplifier circuit and electret condenser microphone using same

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