JPS6451640A - Electrode arrangement of chip carrier ic substrate - Google Patents
Electrode arrangement of chip carrier ic substrateInfo
- Publication number
- JPS6451640A JPS6451640A JP20952287A JP20952287A JPS6451640A JP S6451640 A JPS6451640 A JP S6451640A JP 20952287 A JP20952287 A JP 20952287A JP 20952287 A JP20952287 A JP 20952287A JP S6451640 A JPS6451640 A JP S6451640A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- chip carrier
- electrodes
- electrode arrangement
- row
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/366—Assembling printed circuits with other printed circuits substantially perpendicularly to each other
Abstract
PURPOSE:To facilitate mounting to a mounting substrate having a limited area by arranging external leading-out electrodes for a chip carrier IC substrate on one side in a row. CONSTITUTION:The arrangement of electrodes 2 on a chip carrier IC substrate 1 is concentrated to one side, and the electrodes 2 are disposed in a row, and are not arranged on other three sides. The chip carrier IC substrate 1 is disposed in an array in the vertical direction onto a mounting substrate 4, and the electrodes 2 and conductive sections 5 are abutted and mounted.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20952287A JPS6451640A (en) | 1987-08-24 | 1987-08-24 | Electrode arrangement of chip carrier ic substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20952287A JPS6451640A (en) | 1987-08-24 | 1987-08-24 | Electrode arrangement of chip carrier ic substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6451640A true JPS6451640A (en) | 1989-02-27 |
Family
ID=16574186
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20952287A Pending JPS6451640A (en) | 1987-08-24 | 1987-08-24 | Electrode arrangement of chip carrier ic substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6451640A (en) |
-
1987
- 1987-08-24 JP JP20952287A patent/JPS6451640A/en active Pending
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