JPS6451594A - Ic card - Google Patents

Ic card

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Publication number
JPS6451594A
JPS6451594A JP62208594A JP20859487A JPS6451594A JP S6451594 A JPS6451594 A JP S6451594A JP 62208594 A JP62208594 A JP 62208594A JP 20859487 A JP20859487 A JP 20859487A JP S6451594 A JPS6451594 A JP S6451594A
Authority
JP
Japan
Prior art keywords
routine
time
reset signal
command
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62208594A
Other languages
Japanese (ja)
Inventor
Atsuo Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62208594A priority Critical patent/JPS6451594A/en
Publication of JPS6451594A publication Critical patent/JPS6451594A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To develop an applied program freely without considering a test program by selecting the execution of the applied program and the test program according to a prescribed signal obtained from a data input and output terminal within a prescribed time after a reset signal is received. CONSTITUTION:At the time of inputting the reset signal from a reset signal terminal P3, a branch routine 8b in a processing 8 according to the test program is executed. In the branch routine 8b, within the prescribed time after the reset signal is received from an I/O terminal P5, at the time of receiving no signal for instructing the test program 8a, an initializing routine 7a in a processing 7 according to the applied program is executed to execute a prescribed initialization. Then, the processing is shifted to a command receiving routine 7b and in this routine 7b, a command input from an external input and output device is waited for through the I/O terminal P5. Thereafter, at the time of inputting the command, any of processing programs 7c-7e is executed according to a command input value to return to the command receiving routine 7b again after the execution.
JP62208594A 1987-08-21 1987-08-21 Ic card Pending JPS6451594A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62208594A JPS6451594A (en) 1987-08-21 1987-08-21 Ic card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62208594A JPS6451594A (en) 1987-08-21 1987-08-21 Ic card

Publications (1)

Publication Number Publication Date
JPS6451594A true JPS6451594A (en) 1989-02-27

Family

ID=16558785

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62208594A Pending JPS6451594A (en) 1987-08-21 1987-08-21 Ic card

Country Status (1)

Country Link
JP (1) JPS6451594A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2663441A1 (en) * 1990-06-15 1991-12-20 Mitsubishi Electric Corp INTEGRATED CIRCUIT CARD.

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2663441A1 (en) * 1990-06-15 1991-12-20 Mitsubishi Electric Corp INTEGRATED CIRCUIT CARD.

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