JPS6447201A - Automatic train control signal receiver - Google Patents

Automatic train control signal receiver

Info

Publication number
JPS6447201A
JPS6447201A JP19922687A JP19922687A JPS6447201A JP S6447201 A JPS6447201 A JP S6447201A JP 19922687 A JP19922687 A JP 19922687A JP 19922687 A JP19922687 A JP 19922687A JP S6447201 A JPS6447201 A JP S6447201A
Authority
JP
Japan
Prior art keywords
signal
memory box
control signal
combined
produced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19922687A
Other languages
Japanese (ja)
Inventor
Hiroshi Tachikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Signal Co Ltd
Original Assignee
Nippon Signal Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Signal Co Ltd filed Critical Nippon Signal Co Ltd
Priority to JP19922687A priority Critical patent/JPS6447201A/en
Publication of JPS6447201A publication Critical patent/JPS6447201A/en
Pending legal-status Critical Current

Links

Landscapes

  • Train Traffic Observation, Control, And Security (AREA)
  • Electric Propulsion And Braking For Vehicles (AREA)

Abstract

PURPOSE:To improve speed responsiveness on board to variation of ATC signal, by combining a received raw signal and a sub signal according to a predetermined condition. CONSTITUTION:Upon production of a signal (main or sub signal), it is judged whether a counterpart signal has been emitted within a set waiting time. If it has been produced, they are combined and registered in a memory box 8. If it has not been produced, it is judged whether there is a signal having no counterpart signal in the memory box 8. If there is a signal having no counterpart signal and that signal can be combined with the produced signal, they are combined and registered in the memory box 8. Then a speed control signal is outputted based on a combination stored in the memory box 8.
JP19922687A 1987-08-11 1987-08-11 Automatic train control signal receiver Pending JPS6447201A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19922687A JPS6447201A (en) 1987-08-11 1987-08-11 Automatic train control signal receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19922687A JPS6447201A (en) 1987-08-11 1987-08-11 Automatic train control signal receiver

Publications (1)

Publication Number Publication Date
JPS6447201A true JPS6447201A (en) 1989-02-21

Family

ID=16404244

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19922687A Pending JPS6447201A (en) 1987-08-11 1987-08-11 Automatic train control signal receiver

Country Status (1)

Country Link
JP (1) JPS6447201A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03128760A (en) * 1989-10-16 1991-05-31 Daido Signal Co Ltd Digital code demodulation type automatic train control device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03128760A (en) * 1989-10-16 1991-05-31 Daido Signal Co Ltd Digital code demodulation type automatic train control device

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