JPS6447131A - Syndrome generating method - Google Patents

Syndrome generating method

Info

Publication number
JPS6447131A
JPS6447131A JP20436387A JP20436387A JPS6447131A JP S6447131 A JPS6447131 A JP S6447131A JP 20436387 A JP20436387 A JP 20436387A JP 20436387 A JP20436387 A JP 20436387A JP S6447131 A JPS6447131 A JP S6447131A
Authority
JP
Japan
Prior art keywords
syndrome
series
data
error
correction processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20436387A
Other languages
Japanese (ja)
Inventor
Yoichiro Sako
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP20436387A priority Critical patent/JPS6447131A/en
Publication of JPS6447131A publication Critical patent/JPS6447131A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reduce the correction processing time without reading all series data on each occasion to obtain a syndrome by providing a syndrome register storing at least one syndrome in row/column directions and correcting the syndrome of the other series in correcting an error symbol. CONSTITUTION:A data from an input terminal 20 is sent to a C1 demodulator 11 via a switch 15, the error correction processing in the row (C1 series) direction and the result is stored in the C1 syndrome register 13. Then the data is fed to a C2 demodulator via a switch circuit 16 and the error correction processing in the column direction (C2 series) in implemented. In this case, the register 13 is updated by a C1 syndrome update circuit 21 in response to the symbol whose error is corrected. Thus, it is not required to read all the data of the series after the correction of error symbol and the correction processing time is reduced.
JP20436387A 1987-08-18 1987-08-18 Syndrome generating method Pending JPS6447131A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20436387A JPS6447131A (en) 1987-08-18 1987-08-18 Syndrome generating method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20436387A JPS6447131A (en) 1987-08-18 1987-08-18 Syndrome generating method

Publications (1)

Publication Number Publication Date
JPS6447131A true JPS6447131A (en) 1989-02-21

Family

ID=16489274

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20436387A Pending JPS6447131A (en) 1987-08-18 1987-08-18 Syndrome generating method

Country Status (1)

Country Link
JP (1) JPS6447131A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0821493A1 (en) * 1996-07-23 1998-01-28 STMicroelectronics S.A. Error correction system in data frames comprising horizontal and vertical parity codes
US6581178B1 (en) 1999-02-15 2003-06-17 Nec Corporation Error correction coding/decoding method and apparatus

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62117424A (en) * 1985-11-18 1987-05-28 Fujitsu Ltd Correcting system for combined code error

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62117424A (en) * 1985-11-18 1987-05-28 Fujitsu Ltd Correcting system for combined code error

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0821493A1 (en) * 1996-07-23 1998-01-28 STMicroelectronics S.A. Error correction system in data frames comprising horizontal and vertical parity codes
FR2751810A1 (en) * 1996-07-23 1998-01-30 Sgs Thomson Microelectronics ERROR CORRECTION SYSTEM IN DATA FRAMES HAVING HORIZONTAL AND VERTICAL PARITY CODES
US6032283A (en) * 1996-07-23 2000-02-29 Sgs-Thomson Microelectronics S.A. System for correcting errors in data frames having horizontal and vertical parity codes
US6581178B1 (en) 1999-02-15 2003-06-17 Nec Corporation Error correction coding/decoding method and apparatus

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