JPS6445192A - Surface attaching packaging printed wiring board - Google Patents

Surface attaching packaging printed wiring board

Info

Publication number
JPS6445192A
JPS6445192A JP20183987A JP20183987A JPS6445192A JP S6445192 A JPS6445192 A JP S6445192A JP 20183987 A JP20183987 A JP 20183987A JP 20183987 A JP20183987 A JP 20183987A JP S6445192 A JPS6445192 A JP S6445192A
Authority
JP
Japan
Prior art keywords
conductor
surface attaching
lands
conductor lands
height
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20183987A
Other languages
Japanese (ja)
Other versions
JPH0728118B2 (en
Inventor
Shusaku Izumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62201839A priority Critical patent/JPH0728118B2/en
Publication of JPS6445192A publication Critical patent/JPS6445192A/en
Publication of JPH0728118B2 publication Critical patent/JPH0728118B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PURPOSE:To reduce the occurrence of short circuits by depositing a chemical copper plating on the conductor lands at the time of the surface attaching packaging, to form a copper film on the upper surface of the conductor lands, and forming an arc section having the radius of the same size as the height of the conductor lands on both end faces in the arrangement direction and on the shoulder sections. CONSTITUTION:A plurality of conductor lands 4 are placed on a base material a with an interval, consisting of a conductor circuit 2' formed of 1 copper foil 2, and a copper film 3' formed on the upper surface of the conductor circuit 2' and on both end faces in the arrangement direction by depositing a chemical copper plating 3. The copper film on both end faces 4b are formed in an arc having a radius of the same size as the height of the conductor lands 4. With this set-up, the short-circuit failures between the conductor lands at the surface attaching packaging time can be reduced, and the height of each conductor land is lowered to reduce the amount of a solder paste used at the surface attaching time, thereby enabling the improvement of the quality and the reduc tion of the manufacture cost.
JP62201839A 1987-08-14 1987-08-14 Method for manufacturing imposition mounted printed wiring board Expired - Lifetime JPH0728118B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62201839A JPH0728118B2 (en) 1987-08-14 1987-08-14 Method for manufacturing imposition mounted printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62201839A JPH0728118B2 (en) 1987-08-14 1987-08-14 Method for manufacturing imposition mounted printed wiring board

Publications (2)

Publication Number Publication Date
JPS6445192A true JPS6445192A (en) 1989-02-17
JPH0728118B2 JPH0728118B2 (en) 1995-03-29

Family

ID=16447747

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62201839A Expired - Lifetime JPH0728118B2 (en) 1987-08-14 1987-08-14 Method for manufacturing imposition mounted printed wiring board

Country Status (1)

Country Link
JP (1) JPH0728118B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01253991A (en) * 1988-04-01 1989-10-11 Nec Corp Printed circuit board
US5076260A (en) * 1989-09-14 1991-12-31 Bodysonic Kabushiki Kaisha Sensible body vibration

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58202589A (en) * 1982-05-21 1983-11-25 株式会社日立製作所 Method of producing printed circuit board
JPS612386A (en) * 1984-06-15 1986-01-08 株式会社日立製作所 Method of producing printed circuit board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58202589A (en) * 1982-05-21 1983-11-25 株式会社日立製作所 Method of producing printed circuit board
JPS612386A (en) * 1984-06-15 1986-01-08 株式会社日立製作所 Method of producing printed circuit board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01253991A (en) * 1988-04-01 1989-10-11 Nec Corp Printed circuit board
US5076260A (en) * 1989-09-14 1991-12-31 Bodysonic Kabushiki Kaisha Sensible body vibration

Also Published As

Publication number Publication date
JPH0728118B2 (en) 1995-03-29

Similar Documents

Publication Publication Date Title
NZ184109A (en) Fluxed solder composition used in printed circuit board production: soft soldering
JPS5745955A (en) Sealing container
GB1447075A (en) Printed circuit boards
EP0358332A3 (en) Circuit board and method of soldering
JPS6480032A (en) Semiconductor device and manufacture thereof
EP0169530A3 (en) Multilayer printed circuit board
GB1269592A (en) Sub-element for electronic circuit board
MY100046A (en) Printed circuit boards
EP0126164A4 (en) Method of connecting double-sided circuits.
JPS6445192A (en) Surface attaching packaging printed wiring board
JP2642922B2 (en) Printed wiring board
JPS5636147A (en) Semiconductor device and its manufacture
MY110114A (en) Printed wiring board
DE3363638D1 (en) Method for making electrical connections between the two faces of a printed circuit board and a printing stamp for the same
JPS5671926A (en) Chip carrier
JPS647692A (en) Printed wiring board and manufacture thereof
GB1447070A (en) Conductor base for breadboard or prototype circuits tuning arrangements
JPS5618454A (en) Hybrid integrated circuit
JPS57190341A (en) Circuit borad composition
GB9006855D0 (en) Method of producing a printed circuit board
GB1372901A (en) Electrical interconnection structure
JPS57193051A (en) Multilayer circuit board
JPS6428891A (en) Multi-layer printed circuit board
JPS57167609A (en) Laminated intermediate-frequency transformer
JPS6477988A (en) Printed wiring board