JPS6444562A - Information processor - Google Patents

Information processor

Info

Publication number
JPS6444562A
JPS6444562A JP20116887A JP20116887A JPS6444562A JP S6444562 A JPS6444562 A JP S6444562A JP 20116887 A JP20116887 A JP 20116887A JP 20116887 A JP20116887 A JP 20116887A JP S6444562 A JPS6444562 A JP S6444562A
Authority
JP
Japan
Prior art keywords
ready
cpu
initial program
value
service processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20116887A
Other languages
Japanese (ja)
Inventor
Koichi Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP20116887A priority Critical patent/JPS6444562A/en
Publication of JPS6444562A publication Critical patent/JPS6444562A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)

Abstract

PURPOSE:To shorten the rise time of an I/O device by executing retrying operation within a set prescribed time when the I/O device is not-ready at the time of initial program loading. CONSTITUTION:When a service processor 20 commands a central processing unit (CPU) 50 to travel the load routine of an initializing program, an initial program reading command is transmitted to the I/O device 30 through an I/O control device 40. When the I/O device 30 is not-ready, an I/O device state holding part 51 holds the information of the effect in its inside. When the contents of the holding part 51 is not-ready, the service processor 20 receiving end report from the CPU 50 reads out the value of a timer part 10, and when the value does not reach a limit value, the CPU 50 is allowed to start initial program loading again.
JP20116887A 1987-08-11 1987-08-11 Information processor Pending JPS6444562A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20116887A JPS6444562A (en) 1987-08-11 1987-08-11 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20116887A JPS6444562A (en) 1987-08-11 1987-08-11 Information processor

Publications (1)

Publication Number Publication Date
JPS6444562A true JPS6444562A (en) 1989-02-16

Family

ID=16436494

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20116887A Pending JPS6444562A (en) 1987-08-11 1987-08-11 Information processor

Country Status (1)

Country Link
JP (1) JPS6444562A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007096956A1 (en) 2006-02-22 2007-08-30 Fujitsu Limited Central processing unit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007096956A1 (en) 2006-02-22 2007-08-30 Fujitsu Limited Central processing unit
US7937613B2 (en) 2006-02-22 2011-05-03 Fujitsu Limited Central processing apparatus

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