JPS6444052A - Hybrid integrated circuit - Google Patents
Hybrid integrated circuitInfo
- Publication number
- JPS6444052A JPS6444052A JP20109787A JP20109787A JPS6444052A JP S6444052 A JPS6444052 A JP S6444052A JP 20109787 A JP20109787 A JP 20109787A JP 20109787 A JP20109787 A JP 20109787A JP S6444052 A JPS6444052 A JP S6444052A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- resin
- wax
- impregnated
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
PURPOSE:To improve moisture resistance and cleaning resistance by providing a first resin layer covering an electronic component and a substrate, a second resin layer impregnated with wax covering the first layer, and a third resin layer covering the second layer. CONSTITUTION:An aluminum substrate 1, a component, such as a semiconductor IC 2 placed on the substrate 1 and a phenol precoat 4 are covered with phenol resin 6, which is covered with a wax layer 7 in which the resin 6 is impregnated with wax. The layer 7 in which the resin 6 is impregnated with wax is further covered with a phenol resin 8. Thus, the wax intermediate layer 7 is provided between the resins 6 and 8 to improve moisture resistance and cleaning resistance.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20109787A JPS6444052A (en) | 1987-08-11 | 1987-08-11 | Hybrid integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20109787A JPS6444052A (en) | 1987-08-11 | 1987-08-11 | Hybrid integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6444052A true JPS6444052A (en) | 1989-02-16 |
Family
ID=16435344
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20109787A Pending JPS6444052A (en) | 1987-08-11 | 1987-08-11 | Hybrid integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6444052A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0417787A2 (en) * | 1989-09-13 | 1991-03-20 | Kabushiki Kaisha Toshiba | Multimold semiconductor device and the manufacturing method therefor |
US6144106A (en) * | 1996-10-04 | 2000-11-07 | Dow Corning Corporation | Electronic coatings |
-
1987
- 1987-08-11 JP JP20109787A patent/JPS6444052A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0417787A2 (en) * | 1989-09-13 | 1991-03-20 | Kabushiki Kaisha Toshiba | Multimold semiconductor device and the manufacturing method therefor |
US5057457A (en) * | 1989-09-13 | 1991-10-15 | Kabushiki Kaisha Toshiba | Multimold semiconductor device and the manufacturing method therefor |
US6144106A (en) * | 1996-10-04 | 2000-11-07 | Dow Corning Corporation | Electronic coatings |
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