JPS6443435U - - Google Patents

Info

Publication number
JPS6443435U
JPS6443435U JP13833287U JP13833287U JPS6443435U JP S6443435 U JPS6443435 U JP S6443435U JP 13833287 U JP13833287 U JP 13833287U JP 13833287 U JP13833287 U JP 13833287U JP S6443435 U JPS6443435 U JP S6443435U
Authority
JP
Japan
Prior art keywords
reset period
write pulse
binary counter
chip microcomputer
writing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13833287U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13833287U priority Critical patent/JPS6443435U/ja
Publication of JPS6443435U publication Critical patent/JPS6443435U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Microcomputers (AREA)
JP13833287U 1987-09-09 1987-09-09 Pending JPS6443435U (OSRAM)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13833287U JPS6443435U (OSRAM) 1987-09-09 1987-09-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13833287U JPS6443435U (OSRAM) 1987-09-09 1987-09-09

Publications (1)

Publication Number Publication Date
JPS6443435U true JPS6443435U (OSRAM) 1989-03-15

Family

ID=31400568

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13833287U Pending JPS6443435U (OSRAM) 1987-09-09 1987-09-09

Country Status (1)

Country Link
JP (1) JPS6443435U (OSRAM)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60245013A (ja) * 1984-05-18 1985-12-04 Nec Corp メモリ初期化回路

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60245013A (ja) * 1984-05-18 1985-12-04 Nec Corp メモリ初期化回路

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