JPS6441936A - Priority deciding circuit - Google Patents

Priority deciding circuit

Info

Publication number
JPS6441936A
JPS6441936A JP19734587A JP19734587A JPS6441936A JP S6441936 A JPS6441936 A JP S6441936A JP 19734587 A JP19734587 A JP 19734587A JP 19734587 A JP19734587 A JP 19734587A JP S6441936 A JPS6441936 A JP S6441936A
Authority
JP
Japan
Prior art keywords
priority
bit information
respective input
outputted
show
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19734587A
Other languages
Japanese (ja)
Other versions
JPH07113895B2 (en
Inventor
Toru Komagawa
Hiroyuki Kida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP19734587A priority Critical patent/JPH07113895B2/en
Publication of JPS6441936A publication Critical patent/JPS6441936A/en
Publication of JPH07113895B2 publication Critical patent/JPH07113895B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer

Abstract

PURPOSE:To execute the programming of a priority by storing 1 bit information in a binary code to show the priority of respective input lines, detecting 1 bit information to show the highest priority out of them and outputting a response signal. CONSTITUTION:The priority to plural respective input signal lines is given from a priority giving means with a binary code, the 1 bit information of the code is inputted to the 1 bit memory circuit of a 2-level deciding circuit and an output signal is detected from respective memory circuits to respective input signals with the detecting means. Out of respective pieces of 1 bit information, the 1 bit information to show the highest sequence is detected, outputted to the response output circuit, the response signal is outputted corresponding to respective input signals of respective input signal lines is outputted in accordance with the detecting information and the 2-level deciding circuit is provided corresponding to respective bits of the binary code.
JP19734587A 1987-08-07 1987-08-07 Priority judgment circuit Expired - Fee Related JPH07113895B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19734587A JPH07113895B2 (en) 1987-08-07 1987-08-07 Priority judgment circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19734587A JPH07113895B2 (en) 1987-08-07 1987-08-07 Priority judgment circuit

Publications (2)

Publication Number Publication Date
JPS6441936A true JPS6441936A (en) 1989-02-14
JPH07113895B2 JPH07113895B2 (en) 1995-12-06

Family

ID=16372932

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19734587A Expired - Fee Related JPH07113895B2 (en) 1987-08-07 1987-08-07 Priority judgment circuit

Country Status (1)

Country Link
JP (1) JPH07113895B2 (en)

Also Published As

Publication number Publication date
JPH07113895B2 (en) 1995-12-06

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees