JPS6438816U - - Google Patents
Info
- Publication number
- JPS6438816U JPS6438816U JP13498887U JP13498887U JPS6438816U JP S6438816 U JPS6438816 U JP S6438816U JP 13498887 U JP13498887 U JP 13498887U JP 13498887 U JP13498887 U JP 13498887U JP S6438816 U JPS6438816 U JP S6438816U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- current mirror
- transistors
- collector
- mirror circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Amplifiers (AREA)
Description
第1図は本考案に係るカレントミラー回路の回
路図、第2図は従来カレントミラーの回路図であ
る。
Q1……第1トランジスタ、Q2……第2トラ
ンジスタ、Q3……第3トランジスタ、Q3……
第4トランジスタ、CM1……第1カレントミラ
ー回路、CM2……第2カレントミラー回路。
FIG. 1 is a circuit diagram of a current mirror circuit according to the present invention, and FIG. 2 is a circuit diagram of a conventional current mirror. Q1 ...first transistor, Q2 ...second transistor, Q3 ...third transistor, Q3 ...
Fourth transistor, CM1 ...first current mirror circuit, CM2 ...second current mirror circuit.
Claims (1)
のカレントミラー回路と、第3及び第4のトラン
ジスタにて構成した第2のカレントミラー回路と
を、第1、第3トランジスタの各コレクタ間を接
続すると共に、第3、第4トランジスタの各エミ
ツタと第2トランジスタのコレクタとを接続する
ことにより形成されることを特徴とするカレント
ミラー回路。 A first transistor composed of a first transistor and a second transistor.
and a second current mirror circuit constituted by a third and fourth transistor are connected between the collectors of the first and third transistors, and the emitters of the third and fourth transistors. A current mirror circuit characterized in that it is formed by connecting the collector of the second transistor and the collector of the second transistor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13498887U JPS6438816U (en) | 1987-09-02 | 1987-09-02 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13498887U JPS6438816U (en) | 1987-09-02 | 1987-09-02 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6438816U true JPS6438816U (en) | 1989-03-08 |
Family
ID=31394227
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13498887U Pending JPS6438816U (en) | 1987-09-02 | 1987-09-02 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6438816U (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59178806A (en) * | 1983-03-30 | 1984-10-11 | Nec Corp | Current source circuit |
JPS59178805A (en) * | 1983-03-30 | 1984-10-11 | Nec Corp | Current mirror circuit |
JPS60103812A (en) * | 1983-11-11 | 1985-06-08 | Hitachi Ltd | Bias generating circuit |
-
1987
- 1987-09-02 JP JP13498887U patent/JPS6438816U/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59178806A (en) * | 1983-03-30 | 1984-10-11 | Nec Corp | Current source circuit |
JPS59178805A (en) * | 1983-03-30 | 1984-10-11 | Nec Corp | Current mirror circuit |
JPS60103812A (en) * | 1983-11-11 | 1985-06-08 | Hitachi Ltd | Bias generating circuit |