JPS6438027U - - Google Patents
Info
- Publication number
- JPS6438027U JPS6438027U JP13050687U JP13050687U JPS6438027U JP S6438027 U JPS6438027 U JP S6438027U JP 13050687 U JP13050687 U JP 13050687U JP 13050687 U JP13050687 U JP 13050687U JP S6438027 U JPS6438027 U JP S6438027U
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- input terminal
- circuit
- capacitor
- inverting input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 5
- 230000010355 oscillation Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
第１図は、この考案の一実施例を示すスイープ
回路の回路図、第２図は、従来のスイープ回路の
回路図、第３図は、ＰＬＬのブロツク図、第４図
は、第１図及び第２図の回路の発振波形、第５図
は、第１図の低域通過フイルタ１４及び高域通過
フイルタの伝達特性図である。
図において１は演算増幅器、２，３，４，５，
８，９，１１，１２は抵抗、６，７，１０，１３
はコンデンサ、１４は低域通過フイルタ、１５は
高域通過フイルタ、イは入力端子、ロは出力端子
である。なお、各図同一符号は同一または相当部
分を示す。
FIG. 1 is a circuit diagram of a sweep circuit showing an embodiment of this invention, FIG. 2 is a circuit diagram of a conventional sweep circuit, FIG. 3 is a block diagram of a PLL, and FIG. 4 is a diagram similar to the one shown in FIG. and oscillation waveforms of the circuit in FIG. 2, and FIG. 5 is a transfer characteristic diagram of the low-pass filter 14 and high-pass filter of FIG. 1. In the figure, 1 is an operational amplifier, 2, 3, 4, 5,
8, 9, 11, 12 are resistances, 6, 7, 10, 13
1 is a capacitor, 14 is a low-pass filter, 15 is a high-pass filter, A is an input terminal, and B is an output terminal. Note that the same reference numerals in each figure indicate the same or corresponding parts.
Claims (1)
端子と出力端子の間に抵抗を、非反転入力端子と
出力端子の間に抵抗とコンデンサの直列回路を、
非反転入力端子と接地点の間に抵抗とコンデンサ
の並列回路を有する発振回路において、その発振
器の出力端子に抵抗を付加し、その抵抗の他端と
接地点の間に抵抗と、コンデンサの直列回路を付
加し、発振器の入力端子と接地点の間に抵抗を、
発振器の入力端子に抵抗とコンデンサの並列回路
を付加したことを特徴とするスイープ回路。 A resistor is connected to the inverting input terminal of the operational amplifier, a resistor is connected between the inverting input terminal and the output terminal, and a series circuit of a resistor and a capacitor is connected between the non-inverting input terminal and the output terminal.
In an oscillation circuit that has a parallel circuit of a resistor and a capacitor between a non-inverting input terminal and a ground point, a resistor is added to the output terminal of the oscillator, and a resistor and a capacitor are connected in series between the other end of the resistor and the ground point. Add a circuit and place a resistor between the oscillator input terminal and the ground point.
A sweep circuit characterized by adding a parallel circuit of a resistor and a capacitor to the input terminal of an oscillator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13050687U JPS6438027U (en) | 1987-08-27 | 1987-08-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13050687U JPS6438027U (en) | 1987-08-27 | 1987-08-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6438027U true JPS6438027U (en) | 1989-03-07 |
Family
ID=31385736
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13050687U Pending JPS6438027U (en) | 1987-08-27 | 1987-08-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6438027U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6248935U (en) * | 1985-09-13 | 1987-03-26 |
-
1987
- 1987-08-27 JP JP13050687U patent/JPS6438027U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6248935U (en) * | 1985-09-13 | 1987-03-26 | ||
| JPH0447067Y2 (en) * | 1985-09-13 | 1992-11-06 |
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