JPH0394825U - - Google Patents
Info
- Publication number
- JPH0394825U JPH0394825U JP236890U JP236890U JPH0394825U JP H0394825 U JPH0394825 U JP H0394825U JP 236890 U JP236890 U JP 236890U JP 236890 U JP236890 U JP 236890U JP H0394825 U JPH0394825 U JP H0394825U
- Authority
- JP
- Japan
- Prior art keywords
- operational amplifier
- resistor
- resistors
- circuit
- connection point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 238000005094 computer simulation Methods 0.000 description 1
Landscapes
- Networks Using Active Elements (AREA)
Description
第１図は、この考案による位相等化回路の一実
施例を示す回路図、第２図は、第１図に示す回路
についてコンピユータシミユレーシヨンによつて
得られた振幅および位相に関する周波数特性図、
第３図は従来の位相等化回路の一例を示す回路図
である。
１，３０……演算増幅器。
FIG. 1 is a circuit diagram showing an embodiment of the phase equalization circuit according to this invention, and FIG. 2 is a frequency characteristic regarding amplitude and phase obtained by computer simulation for the circuit shown in FIG. 1. figure,
FIG. 3 is a circuit diagram showing an example of a conventional phase equalization circuit. 1,30... operational amplifier.
Claims (1)
、 入出力端子間に第１と第２の抵抗の直列回路お
よび第１と第２のインピーダンス素子の直列回路
とが並列接続された回路部と、 前記第１と第２の抵抗間の第１の接続点および
前記第１と第２のインピーダンス素子間の第２の
接続点と前記演算増幅器の反転入力間にそれぞれ
接続された第３の抵抗および第３のインピーダン
ス素子と、 前記第１と第２の接続点と前記演算増幅器の出
力端子間にそれぞれ接続された第４の抵抗と第４
のインピーダンス素子と、 を備えて成ることを特徴とする位相等化回路。[Claims for Utility Model Registration] An operational amplifier whose positive phase input terminal is grounded, and a series circuit of first and second resistors and a series circuit of first and second impedance elements between the input and output terminals. a circuit section connected in parallel, and a first connection point between the first and second resistors, a second connection point between the first and second impedance elements, and an inverting input of the operational amplifier, respectively. a third resistor and a third impedance element connected; a fourth resistor and a fourth resistor respectively connected between the first and second connection points and the output terminal of the operational amplifier;
A phase equalization circuit comprising: an impedance element;
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP236890U JPH0394825U (en) | 1990-01-17 | 1990-01-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP236890U JPH0394825U (en) | 1990-01-17 | 1990-01-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0394825U true JPH0394825U (en) | 1991-09-27 |
Family
ID=31506245
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP236890U Pending JPH0394825U (en) | 1990-01-17 | 1990-01-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0394825U (en) |
-
1990
- 1990-01-17 JP JP236890U patent/JPH0394825U/ja active Pending
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