JPS6437846A - Method of resigning gate array substrate - Google Patents

Abstract

PURPOSE:To enable a design, in which there are few mistakes, in a short time by inputting the figure information of a required cell and the design information of a gate array substrate and automatically executing the procedure of the determination of the position of the arrangement of a fundamental cell, the determination of the position of the arrangement of a buffer cell, the display of a design result and an output in succession through computer processing. CONSTITUTION:When the figure information 22a of a fundamental cell, the figure information 22b of a peripheral buffer cell and the design information 22c of a gate array substrate are input through a data input device for a gate-array substrate design system, an electronic computer 24 executes the procedure of the determination of the position of the arrangement of the fundamental cell automatically computing and determining the position of loading at the central section of a substrate of the fundamental cell. The procedure of the determination of the position of the arrangement of the peripheral buffer cell to the periphery of the fundamental cell, the procedure of the display of a design result by a figure display circuit 25 and a figure display unit 26 and the procedure of the output of the design result through a data output device 27 are executed automatically in succession. Accordingly, a design through which hands by hand work and working mistakes are reduced is conducted in a short time.