JPS6435751U - - Google Patents

Info

Publication number
JPS6435751U
JPS6435751U JP1987129190U JP12919087U JPS6435751U JP S6435751 U JPS6435751 U JP S6435751U JP 1987129190 U JP1987129190 U JP 1987129190U JP 12919087 U JP12919087 U JP 12919087U JP S6435751 U JPS6435751 U JP S6435751U
Authority
JP
Japan
Prior art keywords
semiconductor chip
substrate
board
electrically connected
wiring pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987129190U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987129190U priority Critical patent/JPS6435751U/ja
Publication of JPS6435751U publication Critical patent/JPS6435751U/ja
Pending legal-status Critical Current

Links

JP1987129190U 1987-08-27 1987-08-27 Pending JPS6435751U (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987129190U JPS6435751U (enExample) 1987-08-27 1987-08-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987129190U JPS6435751U (enExample) 1987-08-27 1987-08-27

Publications (1)

Publication Number Publication Date
JPS6435751U true JPS6435751U (enExample) 1989-03-03

Family

ID=31383235

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987129190U Pending JPS6435751U (enExample) 1987-08-27 1987-08-27

Country Status (1)

Country Link
JP (1) JPS6435751U (enExample)

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