JPS6433744U - - Google Patents

Info

Publication number
JPS6433744U
JPS6433744U JP1987128174U JP12817487U JPS6433744U JP S6433744 U JPS6433744 U JP S6433744U JP 1987128174 U JP1987128174 U JP 1987128174U JP 12817487 U JP12817487 U JP 12817487U JP S6433744 U JPS6433744 U JP S6433744U
Authority
JP
Japan
Prior art keywords
microwave semiconductor
semiconductor device
chip
mount portion
recess
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987128174U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987128174U priority Critical patent/JPS6433744U/ja
Publication of JPS6433744U publication Critical patent/JPS6433744U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H10W72/01308—Manufacture or treatment of die-attach connectors using permanent auxiliary members, e.g. using alignment marks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07311—Treating the bonding area before connecting, e.g. by applying flux or cleaning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07353—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/331—Shapes of die-attach connectors
    • H10W72/334—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads

Landscapes

  • Die Bonding (AREA)

Description

【図面の簡単な説明】
第１図ａ及びｂはこの考案の一実施例によるマ
イクロ波半導体装置を示す斜視図及び断面図、第
２図ａ及びｂはこの考案の他の実施例によるマイ
クロ波半導体装置を示す斜視図及び断面図、第３
図ａ及びｂは従来のマイクロ波半導体装置を示す
斜視図及び断面図、第４図はマイクロ波半導体チ
ツプの基本構造を示す斜視図、第５図はマウント
後のマイクロ波半導体チツプを示す斜視図である
。 図において、１はキヤリア、２はマイクロ波半
導体チツプ、３ははんだ、４は半導体層、５は金
属層、１０はチツプマウント面、１１は窪みであ
る。なお図中同一符号は同一又は相当部分を示す
。

Claims (1)

  1. 【実用新案登録請求の範囲】 (1) キヤリア上にマイクロ波半導体チツプをマ
    ウントしてなるマイクロ波半導体装置において、 上記キヤリアはそのチツプマウント面のマウン
    ト部分がマウント後の上記チツプの反りに応じた
    ように窪んでいることを特徴とするマイクロ波半
    導体装置。 (2) 上記マウント部分の窪みは、断面がＵ字形
    状であることを特徴とする実用新案登録請求の範
    囲第１項記載のマイクロ波半導体装置。 (3) 上記マウント部分の窪みは、断面がＶ字形
    状であることを特徴とする実用新案登録請求の範
    囲第１項記載のマイクロ波半導体装置。 (4) 上記マウント部分の窪みは、上記チツプの
    反りよりも深いことを特徴とする実用新案登録請
    求の範囲第１項ないし第３項のいずれかに記載の
    マイクロ波半導体装置。
JP1987128174U 1987-08-24 1987-08-24 Pending JPS6433744U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987128174U JPS6433744U (ja) 1987-08-24 1987-08-24

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987128174U JPS6433744U (ja) 1987-08-24 1987-08-24

Publications (1)

Publication Number Publication Date
JPS6433744U true JPS6433744U (ja) 1989-03-02

Family

ID=31381260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987128174U Pending JPS6433744U (ja) 1987-08-24 1987-08-24

Country Status (1)

Country Link
JP (1) JPS6433744U (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003174114A (ja) * 2001-12-07 2003-06-20 Fuji Electric Co Ltd 半導体回路基板および半導体装置
US7774806B2 (en) 2005-10-07 2010-08-10 Enxnet, Inc. Thin optical disc having remote reading capability
JP2016103520A (ja) * 2014-11-27 2016-06-02 京セラ株式会社 電子部品実装用パッケージおよび電子装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003174114A (ja) * 2001-12-07 2003-06-20 Fuji Electric Co Ltd 半導体回路基板および半導体装置
US7774806B2 (en) 2005-10-07 2010-08-10 Enxnet, Inc. Thin optical disc having remote reading capability
JP2016103520A (ja) * 2014-11-27 2016-06-02 京セラ株式会社 電子部品実装用パッケージおよび電子装置

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