JPS6432388A - Data processor - Google Patents

Data processor

Info

Publication number
JPS6432388A
JPS6432388A JP62189271A JP18927187A JPS6432388A JP S6432388 A JPS6432388 A JP S6432388A JP 62189271 A JP62189271 A JP 62189271A JP 18927187 A JP18927187 A JP 18927187A JP S6432388 A JPS6432388 A JP S6432388A
Authority
JP
Japan
Prior art keywords
data
expansion processing
bits
picture memory
converting part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62189271A
Other languages
Japanese (ja)
Inventor
Hiroshi Kusao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62189271A priority Critical patent/JPS6432388A/en
Publication of JPS6432388A publication Critical patent/JPS6432388A/en
Pending legal-status Critical Current

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  • Image Processing (AREA)

Abstract

PURPOSE:To perform the expansion processing based on data parallel processing with a simple constitution by providing a data converting part which moves a block to be expanded of data of one word, which is read out from a picture memory, to a position determined by a data expanding part. CONSTITUTION:2<n>-bits data of one word read out from a picture memory 1 is transposed by a data converting part 2, and upper 2<k>-bits are inputted to an expansion processing part 3. The expansion processing part 3 performs the expansion processing based on data from the data converting part 2 and outputs the result as 2<n>-bits expanded data. In this case, the M-bit parallel output of a shift register 4 is the address to the picture memory 1, and the n-bits parallel output of a shift register 5 is the control code of the data converting part 2. Thus, the expansion processing based on data parallel processing is performed with the simple constitution.
JP62189271A 1987-07-29 1987-07-29 Data processor Pending JPS6432388A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62189271A JPS6432388A (en) 1987-07-29 1987-07-29 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62189271A JPS6432388A (en) 1987-07-29 1987-07-29 Data processor

Publications (1)

Publication Number Publication Date
JPS6432388A true JPS6432388A (en) 1989-02-02

Family

ID=16238523

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62189271A Pending JPS6432388A (en) 1987-07-29 1987-07-29 Data processor

Country Status (1)

Country Link
JP (1) JPS6432388A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11272447A (en) * 1997-12-02 1999-10-08 Digital Equip Corp <Dec> Method for increasing bit depth by bit copying
JP2008110228A (en) * 2003-09-12 2008-05-15 L'oreal Sa Device for packaging and distributing cosmetic product

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11272447A (en) * 1997-12-02 1999-10-08 Digital Equip Corp <Dec> Method for increasing bit depth by bit copying
JP2008110228A (en) * 2003-09-12 2008-05-15 L'oreal Sa Device for packaging and distributing cosmetic product

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