JPS6430493U - - Google Patents
Info
- Publication number
- JPS6430493U JPS6430493U JP1987123432U JP12343287U JPS6430493U JP S6430493 U JPS6430493 U JP S6430493U JP 1987123432 U JP1987123432 U JP 1987123432U JP 12343287 U JP12343287 U JP 12343287U JP S6430493 U JPS6430493 U JP S6430493U
- Authority
- JP
- Japan
- Prior art keywords
- switch
- signal
- correction
- circuit
- group
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012986 modification Methods 0.000 claims 4
- 230000004048 modification Effects 0.000 claims 4
- 230000010355 oscillation Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Description
図面は、本考案の実施例に係る自動車用デジタ
ル時計の回路図。
６……カウンタ群、１４……第４のゲート回路
、１６……ＡＣＣスイツチ、１８……修正スイツ
チ群、２０……第１のゲート回路、２２……第２
のゲート回路、２８……第３のゲート回路。
The drawing is a circuit diagram of a digital automobile watch according to an embodiment of the present invention. 6... Counter group, 14... Fourth gate circuit, 16... ACC switch, 18... Correction switch group, 20... First gate circuit, 22... Second
gate circuit, 28... third gate circuit.
Claims (1)
と、この分周回路からの信号をカウントして時・
分・秒をカウントするカウンタ群と、このカウン
タ群からのカウント信号を表示信号と変換するデ
コーダと、このデコーダからの表示信号を増幅す
るドライバと、このドライバからの表示信号によ
り表示する表示部と、ＡＣＣスイツチと、外部操
作により修正信号を前記カウンタ群に供給する修
正スイツチ群と、この修正スイツチ群からの修正
信号を前記ＡＣＣスイツチからのオンオフ信号で
制御する修正制御回路と、を有する自動車時計に
おいて、前記修正スイツチ群が第１スイツチと第
２スイツチで構成されるとともに、前記修正制御
回路が、前記第１および第２スイツチが接続され
、前記ＡＣＣスイツチオン時のみ前記第１および
第２スイツチからの修正信号を通過させる第１の
ゲート回路と、前記第１スイツチが接続され、前
記ＡＣＣスイツチオフ時のみ前記第１スイツチか
らの修正信号を通過させる第２のゲート回路と、
前記第１および第２のゲート回路の出力信号が入
力し、前記ＡＣＣスイツチあるいは第２スイツチ
オン時のみ前記第１のゲート回路からの修正信号
を前記分および秒のカウンタ群に供給するととも
に前記第２のゲート回路からの修正信号を前記時
のカウンタ群に供給させる第３のゲート回路と、
前記ＡＣＣスイツチあるいは第２スイツチオン時
に前記ドライバを駆動させる駆動信号を出力させ
る第４のゲート回路と、から成ることを特徴とす
る自動車時計。 An oscillator circuit, a frequency divider circuit that divides the frequency of this oscillation circuit, and a signal from this frequency divider circuit are counted and the time is calculated.
A counter group that counts minutes and seconds, a decoder that converts the count signal from this counter group into a display signal, a driver that amplifies the display signal from this decoder, and a display section that displays using the display signal from this driver. , an ACC switch, a correction switch group that supplies a correction signal to the counter group by external operation, and a correction control circuit that controls the correction signal from the correction switch group with an on/off signal from the ACC switch. In the modification switch group, the modification switch group is composed of a first switch and a second switch, and the modification control circuit is connected to the first and second switches, and only when the ACC switch is turned on, the modification control circuit receives a signal from the first and second switches. a second gate circuit connected to the first switch and passing the correction signal from the first switch only when the ACC switch is off;
The output signals of the first and second gate circuits are inputted, and only when the ACC switch or the second switch is turned on, the correction signal from the first gate circuit is supplied to the minute and second counter groups, and the second a third gate circuit that supplies the correction signal from the gate circuit to the time counter group;
An automobile watch comprising: a fourth gate circuit that outputs a drive signal for driving the driver when the ACC switch or the second switch is turned on.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987123432U JPH0441357Y2 (en) | 1987-08-12 | 1987-08-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987123432U JPH0441357Y2 (en) | 1987-08-12 | 1987-08-12 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6430493U true JPS6430493U (en) | 1989-02-23 |
| JPH0441357Y2 JPH0441357Y2 (en) | 1992-09-29 |
Family
ID=31372279
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987123432U Expired JPH0441357Y2 (en) | 1987-08-12 | 1987-08-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0441357Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH076795U (en) * | 1993-07-02 | 1995-01-31 | リズム時計工業株式会社 | Clock correction device with built-in video printer |
-
1987
- 1987-08-12 JP JP1987123432U patent/JPH0441357Y2/ja not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH076795U (en) * | 1993-07-02 | 1995-01-31 | リズム時計工業株式会社 | Clock correction device with built-in video printer |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0441357Y2 (en) | 1992-09-29 |
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