JPS6429924U - - Google Patents

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Publication number
JPS6429924U
JPS6429924U JP12478987U JP12478987U JPS6429924U JP S6429924 U JPS6429924 U JP S6429924U JP 12478987 U JP12478987 U JP 12478987U JP 12478987 U JP12478987 U JP 12478987U JP S6429924 U JPS6429924 U JP S6429924U
Authority
JP
Japan
Prior art keywords
pair
field effect
logic circuit
effect transistors
current switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12478987U
Other languages
Japanese (ja)
Other versions
JPH0625063Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987124789U priority Critical patent/JPH0625063Y2/en
Publication of JPS6429924U publication Critical patent/JPS6429924U/ja
Application granted granted Critical
Publication of JPH0625063Y2 publication Critical patent/JPH0625063Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Logic Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の第１の実施例の構成図、第２
図ａ，ｂは第１の実施例の動作説明図、第３図は
本考案の第２の実施例の構成図、第４図は従来の
３入力ＯＲ／ＮＯＲ回路の構成図である。 １ａ〜１ｃ，１ａ′〜１ｃ，１ｅ，２ａ，２ｂ
，２ａ′，２ｂ′，２ｅ……入力端子、１ｏ，１
ｏ′，２ｏ，２ｏ′……出力端子、１ｄ，１ｓ，
２ｄ，２ｓ……電源端子、１１〜１７，２１〜２
５……ＦＥＴ、１８，１９，２６……シヨツトキ
ダイオード、ＲＬ１，ＲＬ２……負荷抵抗。 Figure 1 is a configuration diagram of the first embodiment of the present invention;
Figures a and b are explanatory diagrams of the operation of the first embodiment, Fig. 3 is a block diagram of the second embodiment of the present invention, and Fig. 4 is a block diagram of a conventional three-input OR/NOR circuit. 1a-1c, 1a'-1c, 1e, 2a, 2b
, 2a', 2b', 2e...input terminal, 1o, 1
o', 2o, 2o'...output terminal, 1d, 1s,
2d, 2s...Power terminal, 11-17, 21-2
5...FET, 18, 19, 26... Schottky diode, RL1 , RL2 ...Load resistance.

Claims (1)

【実用新案登録請求の範囲】 １対の電界効果トランジスタをソース結合した
差動増幅器を複数段接続して成る電流切換形論理
回路において、 前記１対の電界効果トランジスタのうち少なく
とも一方のドレイン側に、これらのドレイン−ソ
ース電圧の差を小さくするようにレベルシフタを
設けたことを特徴とする電流切換形論理回路。[Claims for Utility Model Registration] In a current switching type logic circuit comprising a plurality of stages of differential amplifiers in which a pair of field effect transistors are source-coupled, the drain side of at least one of the pair of field effect transistors is , a current switching type logic circuit characterized in that a level shifter is provided to reduce the difference between these drain-source voltages.
JP1987124789U 1987-08-18 1987-08-18 Current switching type logic circuit Expired - Lifetime JPH0625063Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987124789U JPH0625063Y2 (en) 1987-08-18 1987-08-18 Current switching type logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987124789U JPH0625063Y2 (en) 1987-08-18 1987-08-18 Current switching type logic circuit

Publications (2)

Publication Number Publication Date
JPS6429924U true JPS6429924U (en) 1989-02-22
JPH0625063Y2 JPH0625063Y2 (en) 1994-06-29

Family

ID=31374822

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987124789U Expired - Lifetime JPH0625063Y2 (en) 1987-08-18 1987-08-18 Current switching type logic circuit

Country Status (1)

Country Link
JP (1) JPH0625063Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02228127A (en) * 1989-03-01 1990-09-11 Sumitomo Electric Ind Ltd Semiconductor logic circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58114630A (en) * 1981-12-28 1983-07-08 Fujitsu Ltd Logical circuit
JPS61206317A (en) * 1985-03-11 1986-09-12 Nec Corp Field effect transistor logic circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58114630A (en) * 1981-12-28 1983-07-08 Fujitsu Ltd Logical circuit
JPS61206317A (en) * 1985-03-11 1986-09-12 Nec Corp Field effect transistor logic circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02228127A (en) * 1989-03-01 1990-09-11 Sumitomo Electric Ind Ltd Semiconductor logic circuit

Also Published As

Publication number Publication date
JPH0625063Y2 (en) 1994-06-29

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