JPS6427738U - - Google Patents
Info
- Publication number
- JPS6427738U JPS6427738U JP12368787U JP12368787U JPS6427738U JP S6427738 U JPS6427738 U JP S6427738U JP 12368787 U JP12368787 U JP 12368787U JP 12368787 U JP12368787 U JP 12368787U JP S6427738 U JPS6427738 U JP S6427738U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- input detection
- switch
- detection section
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 8
- 230000005856 abnormality Effects 0.000 claims 1
- 238000012795 verification Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Control By Computers (AREA)
- Programmable Controllers (AREA)
Description
第1図は本考案の一実施例を示す回路図、第2
図は従来のシーケンサ等の回路図を示すものであ
る。
1…外部接点情報用のスイツチ、2…スイツチ
回路、3…DI入力検出部、4…データバツフア
回路、5…データラツチ回路、6…排他的論理和
回路、7…スイツチ作動回路。
Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
The figure shows a circuit diagram of a conventional sequencer, etc. 1... Switch for external contact information, 2... Switch circuit, 3... DI input detection section, 4... Data buffer circuit, 5... Data latch circuit, 6... Exclusive OR circuit, 7... Switch operation circuit.
Claims (1)
検出された信号をデータラツチ回路に記憶し、該
データラツチ回路の出力信号に基づいて演算部で
演算を行う装置において、前記外部接点情報を受
けてオンする外部接点情報用のスイツチと、該外
部接点情報用スイツチと接続されているスイツチ
回路と、該スイツチ回路と接続され、DI入力検
出を行うDI入力検出部と、該DI入力検出部と
接続され、データを一時記憶するデータバツフア
回路と、該データバツフア回路と接続されるデー
タを一時記憶するデータラツチ回路及び該データ
ラツチ回路に記憶したDIチエツク指令と前記デ
ータバツフア回路に記憶した前記DI入力検出部
のチエツクデータとを比較照合する論理回路と、
該論理回路及び前記スイツチ回路に接続され、前
記DI入力検出部の異常をチエツクする前記チエ
ツク指令により前記スイツチ回路を作動させるス
イツチ作動回路とから成り、前記論理回路は照合
の結果正常ならばチエツク指令を解除し、異常の
時にはDI異常を出力させるようにしたことを特
徴とするDI入力検出部のチエツク装置。 In a device in which external contact information is detected by a DI input detection section, the detected signal is stored in a data latch circuit, and a calculation section is performed based on the output signal of the data latch circuit, the device is turned on in response to the external contact information. a switch for external contact information, a switch circuit connected to the external contact information switch, a DI input detection section connected to the switch circuit and configured to detect DI input, and a DI input detection section connected to the DI input detection section. , a data buffer circuit for temporarily storing data, a data latch circuit connected to the data buffer circuit for temporarily storing data, a DI check command stored in the data latch circuit, and check data of the DI input detection unit stored in the data buffer circuit. A logic circuit that compares and matches the
It consists of the logic circuit and a switch operating circuit that is connected to the switch circuit and operates the switch circuit in response to the check command that checks for an abnormality in the DI input detection section, and if the result of verification is normal, the logic circuit issues a check command. 1. A check device for a DI input detection section, characterized in that a DI error is output when there is an error.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12368787U JPS6427738U (en) | 1987-08-12 | 1987-08-12 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12368787U JPS6427738U (en) | 1987-08-12 | 1987-08-12 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6427738U true JPS6427738U (en) | 1989-02-17 |
Family
ID=31372766
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12368787U Pending JPS6427738U (en) | 1987-08-12 | 1987-08-12 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6427738U (en) |
-
1987
- 1987-08-12 JP JP12368787U patent/JPS6427738U/ja active Pending
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