JPS6425238U - - Google Patents
Info
- Publication number
- JPS6425238U JPS6425238U JP12155687U JP12155687U JPS6425238U JP S6425238 U JPS6425238 U JP S6425238U JP 12155687 U JP12155687 U JP 12155687U JP 12155687 U JP12155687 U JP 12155687U JP S6425238 U JPS6425238 U JP S6425238U
- Authority
- JP
- Japan
- Prior art keywords
- conversion means
- power supply
- digital signal
- converter
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Analogue/Digital Conversion (AREA)
Description
第１図および第２図は本考案の一実施例を示す
ものであつて、第１図はＤ／Ａ変換装置の構成を
示す回路図、第２図はマイクロコンピユータにお
いて設定される指令電圧ステツプと出力電圧Ｖ０
（Ｖ）との関係を示すグラフである。
１２はＤ／Ａコンバータ（Ｄ／Ａ変換手段）、
１４は抵抗（Ｄ／Ａ変換手段）、１５はダイオー
ド（Ｄ／Ａ変換手段）、１６は電圧出力端子、１
７は電解コンデンサ（Ｄ／Ａ変換手段）、１８は
トランジスタ（第２の電源）、１９は抵抗（第２
の電源）、２０はツエナーダイオード（第１の電
源）、２１はツエナーダイオード（第２の電源）
、２２は抵抗（第２の電源）、２３は電源（第１
の電源）、２４は電源（第２の電源）、２５は抵
抗（第１の電源）、２６はプルアツプ抵抗（Ｄ／
Ａ変換手段）である。
1 and 2 show an embodiment of the present invention, in which FIG. 1 is a circuit diagram showing the configuration of a D/A converter, and FIG. 2 is a circuit diagram showing a command voltage step set in a microcomputer. and output voltage V 0
(V) is a graph showing the relationship with (V). 12 is a D/A converter (D/A conversion means);
14 is a resistor (D/A conversion means), 15 is a diode (D/A conversion means), 16 is a voltage output terminal, 1
7 is an electrolytic capacitor (D/A conversion means), 18 is a transistor (second power supply), and 19 is a resistor (second
20 is a Zener diode (first power supply), 21 is a Zener diode (second power supply)
, 22 is a resistor (second power supply), 23 is a power supply (first
24 is a power supply (second power supply), 25 is a resistor (first power supply), 26 is a pull-up resistor (D/
A conversion means).
Claims (1)
るＤ／Ａ変換手段と、 Ｄ／Ａ変換手段に接続される第１の電源と、 Ｄ／Ａ変換手段の出力におけるマイナス側に直
列接続され、第２のデイジタル信号に基づいて複
数段階の電位差を発生する第２の電源とを備えた
ことを特徴とするＤ／Ａ変換装置。[Claims for Utility Model Registration] D/A conversion means that generates a voltage based on a first digital signal; a first power source connected to the D/A conversion means; and an output of the D/A conversion means. A D/A converter comprising: a second power supply connected in series to the negative side and generating a plurality of levels of potential difference based on a second digital signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12155687U JPS6425238U (en) | 1987-08-06 | 1987-08-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12155687U JPS6425238U (en) | 1987-08-06 | 1987-08-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6425238U true JPS6425238U (en) | 1989-02-13 |
Family
ID=31368666
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12155687U Pending JPS6425238U (en) | 1987-08-06 | 1987-08-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6425238U (en) |
-
1987
- 1987-08-06 JP JP12155687U patent/JPS6425238U/ja active Pending
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