JPS6424857U - - Google Patents

Info

Publication number
JPS6424857U
JPS6424857U JP1987120561U JP12056187U JPS6424857U JP S6424857 U JPS6424857 U JP S6424857U JP 1987120561 U JP1987120561 U JP 1987120561U JP 12056187 U JP12056187 U JP 12056187U JP S6424857 U JPS6424857 U JP S6424857U
Authority
JP
Japan
Prior art keywords
circuit
processes
input signal
power supply
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987120561U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987120561U priority Critical patent/JPS6424857U/ja
Publication of JPS6424857U publication Critical patent/JPS6424857U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Wire Bonding (AREA)

Description

【図面の簡単な説明】
第１図は本考案の一実施例の配置図、第２図は
他の実施例の配置図である。 １，１６……半導体集積回路、２，１９，２０
……デジタル入力信号を処理する回路網、３，１
７，１８……アナログ入力信号を処理する回路網
、４，５，２１，２２，２３……電源供給線、６
，７，２４，２５，２６……電圧基準線、８，９
，１０，１１，２７，２８，２９，３０，３１，
３２……ワイヤ接続パツド、１２，１３，１４，
１５，３３，３４，３５，３６，３７，３８……
ワイヤ。

Claims (1)

    【実用新案登録請求の範囲】
  1. デジタル入力信号を処理する第１の回路と、ア
    ナログ入力信号を処理する第２回路とを備え、前
    記第１および第２の回路への電源供給線、電圧基
    準線及びワイヤ接続パツドを独立に設けたことを
    特徴とする半導体集積回路。
JP1987120561U 1987-08-05 1987-08-05 Pending JPS6424857U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987120561U JPS6424857U (ja) 1987-08-05 1987-08-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987120561U JPS6424857U (ja) 1987-08-05 1987-08-05

Publications (1)

Publication Number Publication Date
JPS6424857U true JPS6424857U (ja) 1989-02-10

Family

ID=31366781

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987120561U Pending JPS6424857U (ja) 1987-08-05 1987-08-05

Country Status (1)

Country Link
JP (1) JPS6424857U (ja)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5870565A (ja) * 1981-10-23 1983-04-27 Hitachi Ltd 集積回路の電源供給回路
JPS59193046A (ja) * 1983-04-15 1984-11-01 Hitachi Ltd 半導体集積回路装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5870565A (ja) * 1981-10-23 1983-04-27 Hitachi Ltd 集積回路の電源供給回路
JPS59193046A (ja) * 1983-04-15 1984-11-01 Hitachi Ltd 半導体集積回路装置

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