JPS642440Y2 - - Google Patents
Info
- Publication number
- JPS642440Y2 JPS642440Y2 JP1981160265U JP16026581U JPS642440Y2 JP S642440 Y2 JPS642440 Y2 JP S642440Y2 JP 1981160265 U JP1981160265 U JP 1981160265U JP 16026581 U JP16026581 U JP 16026581U JP S642440 Y2 JPS642440 Y2 JP S642440Y2
- Authority
- JP
- Japan
- Prior art keywords
- connector
- semiconductor device
- external lead
- utility
- model registration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 23
- 239000000758 substrate Substances 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims description 2
- 239000012212 insulator Substances 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 description 5
- 239000000919 ceramic Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
Landscapes
- Wire Bonding (AREA)
Description
【考案の詳細な説明】
本考案は半導体装置、特に複数個の半導体チツ
プを同一容器に組立てた半導体装置に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and particularly to a semiconductor device in which a plurality of semiconductor chips are assembled in the same container.
従来、この種の半導体装置の例として、第1図
のごときものがある。1はダーリントントランジ
スタ・チツプ、2,3はダイオード・チツプ4は
リード板を含むヒートシンク、5はセラミツク基
板、6は導電パターン、7は外部リード板、8は
接続子である。このような構造では外部から7の
外部リード板に加えられる力が直接半導体チツプ
1,2,3に加わりこれらを破壊しやすいなどの
欠点があつた。又、他の従来例としては外部リー
ド板に半導体チツプ上の必要個所からアルミニウ
ム、銅などのワイヤにより個別に夫々、接続され
るものがある。ころような構造では部品点数が増
し、高価になるなどの欠点があつた。 Conventionally, there is an example of this type of semiconductor device as shown in FIG. 1 is a Darlington transistor chip, 2 and 3 are diode chips, 4 is a heat sink including a lead plate, 5 is a ceramic substrate, 6 is a conductive pattern, 7 is an external lead plate, and 8 is a connector. Such a structure has the disadvantage that the force applied from the outside to the external lead plate 7 is directly applied to the semiconductor chips 1, 2, and 3, easily destroying them. Another conventional example is one in which external lead plates are individually connected to necessary locations on a semiconductor chip by wires made of aluminum, copper, or the like. The roller-like structure had drawbacks such as an increase in the number of parts and increased costs.
本考案は前記、従来装置の欠点を解決せんとす
るものであり、部品点数を減少し、製作が容易と
なり、構造が堅牢で安価な半導体装置を提供す
る。 The present invention aims to solve the above-mentioned drawbacks of the conventional device, and provides a semiconductor device that reduces the number of parts, is easy to manufacture, has a robust structure, and is inexpensive.
以下、図面により、本考案を詳述する。 Hereinafter, the present invention will be explained in detail with reference to the drawings.
第2図は本考案の実施例をしめす斜視図であつ
て、第1図と同一符号は同一部分をしめている。
追加の符号である9は先端部が分岐した接続子、
10は9の接続子と7の外部リード板を中継する
導電接続個所である。11は製造工程中の接続子
の仮接続部分であり、生産に便なるよう、必要に
応じ設けるもので、完成時には切り離すものであ
る。又、9′は接続子9の共通部分をしめすもの
である。 FIG. 2 is a perspective view showing an embodiment of the present invention, in which the same reference numerals as in FIG. 1 indicate the same parts.
The additional code 9 is a connector with a branched tip;
10 is a conductive connection point that relays the connector 9 and the external lead plate 7. Reference numeral 11 denotes a temporary connection part of the connector during the manufacturing process, which is provided as necessary to facilitate production, and is separated when completed. Further, 9' indicates a common part of the connector 9.
第2図では、接続子9を外部リード板7を同一
金属板で形成しており、部品点数の減少、取扱上
に簡便であるなどの利点がある。 In FIG. 2, the connector 9 is formed of the same metal plate as the external lead plate 7, which has advantages such as a reduction in the number of parts and ease of handling.
本考案の装置を製造するための概略をのべる
と、ダイオード、チツプ2を載置したダーリント
ントランジスタ・チツプ1及びダイオード、チツ
プ3をヒートシンク4上にソルダーした。これを
セラミツク基板5上の導電パターンにのせ、更に
導電接続個所10上に外部リード板7及び接続子
9の端部を治具を用いて載置し、半導体チツプの
必要位置に接続子9の先端接続部があることを確
認してソルダーした。本考案の構造ではワイヤで
半導体チツプ上の必要個所から個別接続する製造
上の複雑さがなく、ベルト炉中での組立が容易と
なる。又、半導体チツプの多数個の電極上に接続
子9の先端接続部が同時に接続できるのに便なる
よう複数の接続子9間を一体とする仮接続部分1
1を容易に設けることができる。仮接続部分11
は組立て後、切り離すものである。 Briefly, a Darlington transistor chip 1 on which a diode and a chip 2 are mounted, and a diode and a chip 3 are soldered onto a heat sink 4. This is placed on the conductive pattern on the ceramic substrate 5, and the ends of the external lead plate 7 and the connector 9 are placed on the conductive connection point 10 using a jig, and the connector 9 is placed at the required position on the semiconductor chip. I made sure that there was a connection at the end and soldered it. The structure of the present invention eliminates the manufacturing complexity of individually connecting wires from required locations on a semiconductor chip, and facilitates assembly in a belt furnace. In addition, there is also a temporary connection part 1 that integrates a plurality of connectors 9 to facilitate connection of the end connection parts of the connectors 9 to multiple electrodes of a semiconductor chip at the same time.
1 can be easily provided. Temporary connection part 11
is to be separated after assembly.
従つて、生産性向上のための構造として複数個
の接続子9の共通部分9′を第2図のように対向
配置して、仮接続部分11を設け易くすることが
より効果的である。 Therefore, as a structure for improving productivity, it is more effective to arrange the common portions 9' of the plurality of connectors 9 so as to face each other as shown in FIG. 2 so as to facilitate the provision of the temporary connection portions 11.
実施例においては、半導体チツプとしてダーリ
ントントランジスタ及びダイオードをしめした
が、他の半導体チツプ、受動素子などを必要に応
じて選択組合せることができることはいうまでも
ない。 In the embodiment, a Darlington transistor and a diode are shown as semiconductor chips, but it goes without saying that other semiconductor chips, passive elements, etc. can be selectively combined as required.
本考案の半導体装置は部品点数を減少し、リー
ド板への外部力が直接、半導体チツプに加わら
ず、組立中、製品後の破壊、損傷が少ない。更に
製作容易、安価となり、集積回路や複合半導体装
置として実用上、有用である。 The semiconductor device of the present invention reduces the number of parts, and the external force to the lead plate is not directly applied to the semiconductor chip, resulting in less breakage and damage during assembly and after the product is manufactured. Furthermore, it is easy to manufacture and inexpensive, and is useful in practice as an integrated circuit or a composite semiconductor device.
第1図は従来の半導体装置の内部斜視図、第2
図は本考案の半導体装置の内部斜視図である。
図において1はダーリントントランジスタ・チ
ツプ、2,3はダイオード・チツプ、4はヒート
シンク、5はセラミツク基板、6は導電パター
ン、7は外部リード板、8は接続子、9は接続
子、9′は接続子9の共通部分、10は導電接続
個所、11は仮接続部分である。
Figure 1 is an internal perspective view of a conventional semiconductor device; Figure 2 is an internal perspective view of a conventional semiconductor device;
The figure is an internal perspective view of the semiconductor device of the present invention. In the figure, 1 is a Darlington transistor chip, 2 and 3 are diode chips, 4 is a heat sink, 5 is a ceramic substrate, 6 is a conductive pattern, 7 is an external lead plate, 8 is a connector, 9 is a connector, and 9' is a A common part of the connector 9, 10 is a conductive connection part, and 11 is a temporary connection part.
Claims (1)
一容器中に組立てた半導体装置において、先端
接続部が分岐した接続子及び外部リードを同一
金属板から形成すると共に前記接続子及び外部
リードを中継する導電接続個所を有することを
特徴とする半導体装置。 (2) 接続子及び外部リード板の1部を絶縁物を介
して容器に固定した実用新案登録請求の範囲第
(1)項記載の半導体装置。 (3) 複数個の接続子の共通部分を対向配置した実
用新案登録請求の範囲第(1)項又は第(2)項記載の
半導体装置。[Claims for Utility Model Registration] (1) In a semiconductor device in which a plurality of semiconductor chips are assembled in the same container via an insulating substrate, a connector with a branched end connection portion and an external lead are formed from the same metal plate. A semiconductor device comprising: a conductive connection point that relays the connector and the external lead; (2) Utility model registration claim No. 1 in which the connector and part of the external lead plate are fixed to the container via an insulator.
The semiconductor device described in (1). (3) A semiconductor device according to claim (1) or (2) of the utility model registration, in which common parts of a plurality of connectors are arranged facing each other.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1981160265U JPS5866640U (en) | 1981-10-29 | 1981-10-29 | semiconductor equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1981160265U JPS5866640U (en) | 1981-10-29 | 1981-10-29 | semiconductor equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5866640U JPS5866640U (en) | 1983-05-06 |
JPS642440Y2 true JPS642440Y2 (en) | 1989-01-20 |
Family
ID=29952680
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1981160265U Granted JPS5866640U (en) | 1981-10-29 | 1981-10-29 | semiconductor equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5866640U (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0734457B2 (en) * | 1988-04-05 | 1995-04-12 | 株式会社東芝 | Semiconductor device |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5384556A (en) * | 1976-12-29 | 1978-07-26 | Fujitsu Ltd | Semiconductor device |
-
1981
- 1981-10-29 JP JP1981160265U patent/JPS5866640U/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5384556A (en) * | 1976-12-29 | 1978-07-26 | Fujitsu Ltd | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPS5866640U (en) | 1983-05-06 |
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