JPS6423189U - - Google Patents
Info
- Publication number
- JPS6423189U JPS6423189U JP11752387U JP11752387U JPS6423189U JP S6423189 U JPS6423189 U JP S6423189U JP 11752387 U JP11752387 U JP 11752387U JP 11752387 U JP11752387 U JP 11752387U JP S6423189 U JPS6423189 U JP S6423189U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- adder
- separates
- delay
- delayed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000926 separation method Methods 0.000 claims description 9
- 230000003111 delayed effect Effects 0.000 claims 3
- 239000000284 extract Substances 0.000 claims 2
- 230000001934 delay Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Processing Of Color Television Signals (AREA)
Description
第1図はこの考案のY/C分離回路の構成を示
す図、第2図A乃至第2図Iはこの考案のY/C
分離回路中の夫々の点での信号の振幅と周波数の
関係を示す図、第3図は従来のY/C分離回路の
構成を示す図、第4図A乃至第4図Hは従来のY
/C分離回路中の夫々の点での信号の振幅と周波
数の関係を示す図である。
1……Y/C分離回路、2……第1の1H遅延
線、3……第2の1H遅延線、5……増幅器、7
……第1の加算器、8……帯域阻止回路、11…
…第2の加算器。
Figure 1 shows the configuration of the Y/C separation circuit of this invention, and Figures 2A to 2I show the Y/C separation circuit of this invention.
A diagram showing the relationship between signal amplitude and frequency at each point in the separation circuit. Figure 3 is a diagram showing the configuration of a conventional Y/C separation circuit. Figures 4A to 4H are diagrams showing the relationship between signal amplitude and frequency at each point in the separation circuit.
FIG. 3 is a diagram showing the relationship between signal amplitude and frequency at each point in the /C separation circuit. 1...Y/C separation circuit, 2...First 1H delay line, 3...Second 1H delay line, 5...Amplifier, 7
...First adder, 8...Band rejection circuit, 11...
...Second adder.
Claims (1)
るY/C分離回路において、 原信号を1H(Hは水平走査期間)遅延する第
1の遅延線と、 該1H遅延線からの出力信号である1H遅延信
号を更に1H遅延する第2の遅延線と、 第1遅延信号を2倍にする増幅器と、 原信号と増幅器の出力信号及び前記第2の遅延
線からの出力信号である2H遅延信号を同相加算
して輝度信号を抽出分離する第1の加算器と、 第1の加算器で抽出分離した輝度信号の周波数
特性を平坦にする帯域阻止回路と、 増幅器の出力信号に対し、原信号と2H遅延信
号とを逆相加算して、クロマ信号を抽出分離する
第2の加算器を具備したことを特徴とするY/C
分離回路。[Claims for Utility Model Registration] In a Y/C separation circuit that separates a luminance signal and a chroma signal from a video signal, a first delay line that delays the original signal by 1H (H is a horizontal scanning period); and the 1H delay. a second delay line for further delaying the 1H delayed signal which is the output signal from the line; an amplifier for doubling the first delayed signal; A first adder that extracts and separates the luminance signal by in-phase addition of the 2H delay signal that is the output signal, a band rejection circuit that flattens the frequency characteristics of the luminance signal extracted and separated by the first adder, and an amplifier. A Y/C characterized by comprising a second adder that adds the original signal and the 2H delayed signal in reverse phase to the output signal, and extracts and separates the chroma signal.
Separation circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11752387U JPS6423189U (en) | 1987-07-31 | 1987-07-31 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11752387U JPS6423189U (en) | 1987-07-31 | 1987-07-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6423189U true JPS6423189U (en) | 1989-02-07 |
Family
ID=31361054
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11752387U Pending JPS6423189U (en) | 1987-07-31 | 1987-07-31 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6423189U (en) |
-
1987
- 1987-07-31 JP JP11752387U patent/JPS6423189U/ja active Pending
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