JPS6421534A - Pipeline computing device - Google Patents

Pipeline computing device

Info

Publication number
JPS6421534A
JPS6421534A JP62178270A JP17827087A JPS6421534A JP S6421534 A JPS6421534 A JP S6421534A JP 62178270 A JP62178270 A JP 62178270A JP 17827087 A JP17827087 A JP 17827087A JP S6421534 A JPS6421534 A JP S6421534A
Authority
JP
Japan
Prior art keywords
data
processing unit
priority order
state
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62178270A
Other languages
Japanese (ja)
Inventor
Takao Kusano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62178270A priority Critical patent/JPS6421534A/en
Publication of JPS6421534A publication Critical patent/JPS6421534A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To process inputted data with high priority order by providing the titled device with a pipeline processing unit and a receiving part for inputting/ outputting pipeline processing data. CONSTITUTION:At the time of a state 102, a flow control circuit 7 checks the priority order of data on signal lines 11, 12, stores data B1 in a shunting part 6 without processing the data by a processing unit 3 because data A1 follows the data B1, and allows the data A1 to be processed by a processing unit 2. At the time of a state 103, the priority order of data B2 arriving at a processing unit 2 is, B, so that the circuit 7 is not driven. In a state 104, the data A1 arrive at a processing unit 4 and the output priority order of the data B2 in the processing unit 2 is the same as that of the data B1 shunted in the shunting part 6, so that input to the processing unit 3 is stopped and the data B1 is restored from the shunting part 6 to the processing unit 3 and processed. At that time, a busy signal is sent from the processing unit 2 to the processing unit 1 and the output of data B3 from the processing unit 1 is stopped.
JP62178270A 1987-07-16 1987-07-16 Pipeline computing device Pending JPS6421534A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62178270A JPS6421534A (en) 1987-07-16 1987-07-16 Pipeline computing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62178270A JPS6421534A (en) 1987-07-16 1987-07-16 Pipeline computing device

Publications (1)

Publication Number Publication Date
JPS6421534A true JPS6421534A (en) 1989-01-24

Family

ID=16045544

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62178270A Pending JPS6421534A (en) 1987-07-16 1987-07-16 Pipeline computing device

Country Status (1)

Country Link
JP (1) JPS6421534A (en)

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