JPS6420796A - Time switch circuit - Google Patents

Time switch circuit

Info

Publication number
JPS6420796A
JPS6420796A JP17801587A JP17801587A JPS6420796A JP S6420796 A JPS6420796 A JP S6420796A JP 17801587 A JP17801587 A JP 17801587A JP 17801587 A JP17801587 A JP 17801587A JP S6420796 A JPS6420796 A JP S6420796A
Authority
JP
Japan
Prior art keywords
data
reading
time
memory
time slot
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17801587A
Other languages
Japanese (ja)
Other versions
JP2637105B2 (en
Inventor
Hiroaki Yamashita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62178015A priority Critical patent/JP2637105B2/en
Publication of JPS6420796A publication Critical patent/JPS6420796A/en
Application granted granted Critical
Publication of JP2637105B2 publication Critical patent/JP2637105B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To prevent a nonconformity that data in a time slot are re-written during reading and the data destroyed by changing over respectively one side memory for reading and the other one for writing, at the time of reading the data in the initial part of one frame data to be outputted of a time slot. CONSTITUTION:A write read switching means 100 is provided, and a switching timing by the instruction of a memory 6A which in made writable by a write instructing signal is delayed by a delay time (tau) from a switching timing instructed by a memory 6B which is made readable by a read instructing signal. Accordingly, during a time to cause a lag by the delay, one side memory 6A is exclusively used for the writing and the other side memory 6B for a reading without fail. Namely, since the period to cause the lag is equivalent to the time of a data reading in the time slot of the initial part of the data of one frame to be outputted, such a nonconformity that the data to be inserted into the time slot are re-written while reading at the memory is not caused.
JP62178015A 1987-07-16 1987-07-16 Time switch circuit Expired - Fee Related JP2637105B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62178015A JP2637105B2 (en) 1987-07-16 1987-07-16 Time switch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62178015A JP2637105B2 (en) 1987-07-16 1987-07-16 Time switch circuit

Publications (2)

Publication Number Publication Date
JPS6420796A true JPS6420796A (en) 1989-01-24
JP2637105B2 JP2637105B2 (en) 1997-08-06

Family

ID=16041074

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62178015A Expired - Fee Related JP2637105B2 (en) 1987-07-16 1987-07-16 Time switch circuit

Country Status (1)

Country Link
JP (1) JP2637105B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59226593A (en) * 1983-06-08 1984-12-19 Iwatsu Electric Co Ltd Time division type switch circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59226593A (en) * 1983-06-08 1984-12-19 Iwatsu Electric Co Ltd Time division type switch circuit

Also Published As

Publication number Publication date
JP2637105B2 (en) 1997-08-06

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees