JPS6419578A - Memory device - Google Patents

Memory device

Info

Publication number
JPS6419578A
JPS6419578A JP62176153A JP17615387A JPS6419578A JP S6419578 A JPS6419578 A JP S6419578A JP 62176153 A JP62176153 A JP 62176153A JP 17615387 A JP17615387 A JP 17615387A JP S6419578 A JPS6419578 A JP S6419578A
Authority
JP
Japan
Prior art keywords
line
write
memory
bit
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62176153A
Other languages
Japanese (ja)
Inventor
Hideyuki Hamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62176153A priority Critical patent/JPS6419578A/en
Publication of JPS6419578A publication Critical patent/JPS6419578A/en
Pending legal-status Critical Current

Links

Landscapes

  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To perform a memory read/write operation and a multi-bit shifting or multi-bit swapping operation simultaneously, by connecting each bit line in a memory to a bit input/output line on which input data from the outside the memory or output data to the outside the memory is put via a switch circuit. CONSTITUTION:When the memory write operation and the multi-bit shifting operation are performed simultaneously, a write address is supplied to a memory address line 1, and a write signifying signal line 8 is signified, and write data is supplied to an input data line, and the number of shift is supplied to a shift number indicating line 12. The write data, since the write signifying signal line 8 being signified, is sent to the bit input/output line 11 via an input/output buffer 7, and is sent to a word line in a state where a required number of bits are shifted via the switch circuit 5 turned ON by the instruction of a shift control line 14 from a shift control part 13 which decodes the number of shift, and is written on a data memory part 6 of a required word via the switch circuit 5 turned ON by the word line being signified by the instruction of an address decoder 2 which decodes the write address.
JP62176153A 1987-07-15 1987-07-15 Memory device Pending JPS6419578A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62176153A JPS6419578A (en) 1987-07-15 1987-07-15 Memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62176153A JPS6419578A (en) 1987-07-15 1987-07-15 Memory device

Publications (1)

Publication Number Publication Date
JPS6419578A true JPS6419578A (en) 1989-01-23

Family

ID=16008587

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62176153A Pending JPS6419578A (en) 1987-07-15 1987-07-15 Memory device

Country Status (1)

Country Link
JP (1) JPS6419578A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008213694A (en) * 2007-03-06 2008-09-18 Toyota Auto Body Co Ltd Vehicle body upper part structure for automobile

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008213694A (en) * 2007-03-06 2008-09-18 Toyota Auto Body Co Ltd Vehicle body upper part structure for automobile

Similar Documents

Publication Publication Date Title
JPS6462743A (en) Memory access controller
KR890004319A (en) Decrypt / Write Memory with Multiple Column Selection Modes
KR890004318A (en) Decrypt / Write Memory with On-Chip Input Data Register
EP0211565A2 (en) Random access memories
KR930022206A (en) Electronic computer memory with bitline switch array
JPS6476600A (en) Semiconductor memory device
KR890002883A (en) Semiconductor integrated circuit device
KR860009422A (en) Memory circuit
KR900005328A (en) MEMORY CARD
KR930003400B1 (en) Status register device for microprocessor
EP0217479A2 (en) Information processing unit
KR100242453B1 (en) Semiconductor device
EP0381940A1 (en) Register bank circuit
KR960706123A (en) Microcontroller with a reconfigurble progam status word
JPS6419578A (en) Memory device
JPS63184987A (en) Semiconductor storage device
JPS56156978A (en) Memory control system
JPS5616980A (en) Write-in system of one-bit of memory
JPS54111237A (en) Main memory
SU1564633A1 (en) Device for addressing immediate-access memory
KR970060223A (en) Semiconductor memory device and control method thereof
JPS61255451A (en) Data processing unit
JPS6452297A (en) Semiconductor intetrated circuit with storing part
JPS6423488A (en) Memory
SU781974A1 (en) Storage