JPS6417296A - Semiconductor storage device - Google Patents

Semiconductor storage device

Info

Publication number
JPS6417296A
JPS6417296A JP17224487A JP17224487A JPS6417296A JP S6417296 A JPS6417296 A JP S6417296A JP 17224487 A JP17224487 A JP 17224487A JP 17224487 A JP17224487 A JP 17224487A JP S6417296 A JPS6417296 A JP S6417296A
Authority
JP
Japan
Prior art keywords
memory cell
mos transistor
transistor
cell block
bit check
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17224487A
Other languages
Japanese (ja)
Other versions
JPH0738277B2 (en
Inventor
Hiroshi Iwahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP17224487A priority Critical patent/JPH0738277B2/en
Publication of JPS6417296A publication Critical patent/JPS6417296A/en
Publication of JPH0738277B2 publication Critical patent/JPH0738277B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To increase a current flowing to a memory cell block, and to contrive to improve a read-out speed by providing a bit check use transistor for storing an assignment state of the data of the memory cell block, between a selection use transistor and a memory cell use transistor. CONSTITUTION:Between a selection use MOS transistor S1 and a memory cell use MOS transistor M1, a bit check use MOS transistor CT which is brought to a conduction control by a signal C is provided. This bit check use MOS transistor CT stores which of the stored data having more '1' or '0' in one memory cell block 11 has been assigned to a depression type MOS transistor. Accordingly, half or more of the memory cell use MOS transistors for constituting one memory cell block can be formed to the depression type. In such a way, a current flowing to the memory cell block can be increased and set, and also, for a load MOS transistor L1, as well, that of a large current driving capacity can be used, therefore, read-out can be executed at a high speed.
JP17224487A 1987-07-10 1987-07-10 Semiconductor memory device Expired - Lifetime JPH0738277B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17224487A JPH0738277B2 (en) 1987-07-10 1987-07-10 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17224487A JPH0738277B2 (en) 1987-07-10 1987-07-10 Semiconductor memory device

Publications (2)

Publication Number Publication Date
JPS6417296A true JPS6417296A (en) 1989-01-20
JPH0738277B2 JPH0738277B2 (en) 1995-04-26

Family

ID=15938289

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17224487A Expired - Lifetime JPH0738277B2 (en) 1987-07-10 1987-07-10 Semiconductor memory device

Country Status (1)

Country Link
JP (1) JPH0738277B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0640982A2 (en) * 1993-08-27 1995-03-01 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and data programming method
US6091639A (en) * 1993-08-27 2000-07-18 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and data programming method

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0640982A2 (en) * 1993-08-27 1995-03-01 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and data programming method
US5579260A (en) * 1993-08-27 1996-11-26 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and data programming method
EP0640982A3 (en) * 1993-08-27 1997-10-15 Toshiba Kk Non-volatile semiconductor memory device and data programming method.
US5808939A (en) * 1993-08-27 1998-09-15 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and data programming method
US5923588A (en) * 1993-08-27 1999-07-13 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device with a plurality of programming voltage levels
US6091639A (en) * 1993-08-27 2000-07-18 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and data programming method
US6169690B1 (en) 1993-08-27 2001-01-02 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
US6304489B1 (en) 1993-08-27 2001-10-16 Hiroshi Iwahashi Non-volatile semiconductor memory device and data programming method
US6344999B1 (en) 1993-08-27 2002-02-05 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and data programming method
US6353557B2 (en) 1993-08-27 2002-03-05 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and data programming method
US6738293B1 (en) 1993-08-27 2004-05-18 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and data programming method
US6785166B2 (en) 1993-08-27 2004-08-31 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and data programming method
US7064979B2 (en) 1993-08-27 2006-06-20 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and data programming method

Also Published As

Publication number Publication date
JPH0738277B2 (en) 1995-04-26

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