JPS6416087A - Liquid crystal matrix panel drive circuit - Google Patents
Liquid crystal matrix panel drive circuitInfo
- Publication number
- JPS6416087A JPS6416087A JP17145187A JP17145187A JPS6416087A JP S6416087 A JPS6416087 A JP S6416087A JP 17145187 A JP17145187 A JP 17145187A JP 17145187 A JP17145187 A JP 17145187A JP S6416087 A JPS6416087 A JP S6416087A
- Authority
- JP
- Japan
- Prior art keywords
- scanning
- period
- liquid crystal
- horizontal
- matrix panel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Transforming Electric Information Into Light Information (AREA)
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
PURPOSE:To prevent a contrast ratio from being deteriorated by selecting the scanning electrode of a liquid crystal matrix panel for each one between an effective scanning period and a horizontal blanking period respectively. CONSTITUTION:A scanning signal generating circuit 112 uses a control signal from a horizontal synchronizing circuit 105 and a field decision signal from a field decision circuit 106 to form a scanning signal to scanning drivers 109, 110. That is, the scanning signal is supplied to scanning drivers 109, 110 in the such a way that odd-numbered scanning electrodes are selected at the first half period of the horizontal scanning period in one field of interlace scanning and even-numbered scanning electrodes are selected at the latter half and the even-numbered scanning electrodes are selected at the first half period of the horizontal scanning period in the other field and the odd-numbered scanning electrodes are selected in the latter half period. Thus, the two scanning electrodes of the liquid crystal matrix panel are selected during one horizontal scanning period, then the deterioration in contrast ratio is prevented.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17145187A JPS6416087A (en) | 1987-07-09 | 1987-07-09 | Liquid crystal matrix panel drive circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17145187A JPS6416087A (en) | 1987-07-09 | 1987-07-09 | Liquid crystal matrix panel drive circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6416087A true JPS6416087A (en) | 1989-01-19 |
Family
ID=15923346
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17145187A Pending JPS6416087A (en) | 1987-07-09 | 1987-07-09 | Liquid crystal matrix panel drive circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6416087A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04229013A (en) * | 1990-08-29 | 1992-08-18 | Internatl Business Mach Corp <Ibm> | Overload protecting circuit |
JPH0715691A (en) * | 1993-06-23 | 1995-01-17 | Nec Corp | Interlace display control circuit |
-
1987
- 1987-07-09 JP JP17145187A patent/JPS6416087A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04229013A (en) * | 1990-08-29 | 1992-08-18 | Internatl Business Mach Corp <Ibm> | Overload protecting circuit |
JPH0715691A (en) * | 1993-06-23 | 1995-01-17 | Nec Corp | Interlace display control circuit |
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