JPS6416027A - A/d converter - Google Patents
A/d converterInfo
- Publication number
- JPS6416027A JPS6416027A JP16984787A JP16984787A JPS6416027A JP S6416027 A JPS6416027 A JP S6416027A JP 16984787 A JP16984787 A JP 16984787A JP 16984787 A JP16984787 A JP 16984787A JP S6416027 A JPS6416027 A JP S6416027A
- Authority
- JP
- Japan
- Prior art keywords
- bit
- weighted
- switch
- capacitor
- offset
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
PURPOSE:To obtain an conversion characteristic without any offset by using a comparison capacitor weighted with 2<-1> so as to shift the decision of each bit by 1/2 LSB (least significant bit), and applying the A/D conversion afterward. CONSTITUTION:For example, in a 4-bit A/D converter including a sign bit, a capacitor ladder 1 consists of the additional capacitor 2 weighted with 2<-1>, and comparison capacitors 3-6 weighted respectively with 2<-1>, 2<0>, 2<1>, 2<2>, respectively. Then the capacitors 2-6 are charged by an input voltage Vx and the switch 8 is turned off to connect the sampling switch 10 to the ground side and in connecting the ladder switch 11 to the negative reference voltage source 15, then the input voltage Va of the comparator 7 goes to -1/16/VR-Vx and each bit decision is shifted by 1/2 LBS. Thus, in the conversion characteristic, the center value of the analog input and the digital output are matched, then no offset is provided.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62169847A JP2548207B2 (en) | 1987-07-09 | 1987-07-09 | A / D converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62169847A JP2548207B2 (en) | 1987-07-09 | 1987-07-09 | A / D converter |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6416027A true JPS6416027A (en) | 1989-01-19 |
JP2548207B2 JP2548207B2 (en) | 1996-10-30 |
Family
ID=15894036
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62169847A Expired - Lifetime JP2548207B2 (en) | 1987-07-09 | 1987-07-09 | A / D converter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2548207B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03214818A (en) * | 1990-01-19 | 1991-09-20 | Nec Corp | Digital analog conversion circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57109424A (en) * | 1980-12-26 | 1982-07-07 | Oki Electric Ind Co Ltd | Analogue-digital converter |
-
1987
- 1987-07-09 JP JP62169847A patent/JP2548207B2/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57109424A (en) * | 1980-12-26 | 1982-07-07 | Oki Electric Ind Co Ltd | Analogue-digital converter |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03214818A (en) * | 1990-01-19 | 1991-09-20 | Nec Corp | Digital analog conversion circuit |
Also Published As
Publication number | Publication date |
---|---|
JP2548207B2 (en) | 1996-10-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |