JPS6413288A - Static ram - Google Patents
Static ramInfo
- Publication number
- JPS6413288A JPS6413288A JP62112809A JP11280987A JPS6413288A JP S6413288 A JPS6413288 A JP S6413288A JP 62112809 A JP62112809 A JP 62112809A JP 11280987 A JP11280987 A JP 11280987A JP S6413288 A JPS6413288 A JP S6413288A
- Authority
- JP
- Japan
- Prior art keywords
- inversion
- turned
- potential
- line
- vth
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Dram (AREA)
- Static Random-Access Memory (AREA)
Abstract
PURPOSE:To expand the operation area of a sense amplifier by connecting an IO line with power source through an IO load and using the IO load as an MOS transistor. CONSTITUTION:H is stored in a memory cell M1, L is stored in a memory cell M2 and nMOS transistors (Tr) 2 and 5 are turned on by a column selecting signal phi2. By a row selecting signal phi1, nMOSTrs 1 and 4 are turned on and by the inversion of phi1, pMOSTr 11 and 12 are turned on. Besides, the potential of a bit line B and a inversion B are raised from VCC-Vth and the potential of the IO LINE I/O and the inversion of I/O are raised to VCC for precharging. However, Vth is the threshold of the Tr 1 and 4. Next, a word line W1 goes to H, the data of the M1 is read. The potential of the B and the inversion of B is transmitted to the I/O and the inversion of I/O through the Tr 2, and 5 and transmitted to the buffer of a next stage through the sense amplifier. In the same way, when the precharge is executed again, a W2 goes to H, and the data of the M2 is read.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62112809A JPS6413288A (en) | 1987-05-07 | 1987-05-07 | Static ram |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62112809A JPS6413288A (en) | 1987-05-07 | 1987-05-07 | Static ram |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6413288A true JPS6413288A (en) | 1989-01-18 |
Family
ID=14596073
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62112809A Pending JPS6413288A (en) | 1987-05-07 | 1987-05-07 | Static ram |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6413288A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5369620A (en) * | 1992-07-16 | 1994-11-29 | Nec Corporation | Dynamic random access memory device having column selector for selecting data lines connectable with bit lines |
-
1987
- 1987-05-07 JP JP62112809A patent/JPS6413288A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5369620A (en) * | 1992-07-16 | 1994-11-29 | Nec Corporation | Dynamic random access memory device having column selector for selecting data lines connectable with bit lines |
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