JPS641193A - Semiconductor storage device - Google Patents

Semiconductor storage device

Info

Publication number
JPS641193A
JPS641193A JP62157065A JP15706587A JPS641193A JP S641193 A JPS641193 A JP S641193A JP 62157065 A JP62157065 A JP 62157065A JP 15706587 A JP15706587 A JP 15706587A JP S641193 A JPS641193 A JP S641193A
Authority
JP
Japan
Prior art keywords
bit line
line selecting
storage device
switching
threshold voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62157065A
Other languages
Japanese (ja)
Other versions
JPH011193A (en
Inventor
Ryuichi Matsuo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62-157065A priority Critical patent/JPH011193A/en
Priority claimed from JP62-157065A external-priority patent/JPH011193A/en
Publication of JPS641193A publication Critical patent/JPS641193A/en
Publication of JPH011193A publication Critical patent/JPH011193A/en
Pending legal-status Critical Current

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  • Dram (AREA)

Abstract

PURPOSE: To shorten an access time by setting the threshold voltage of the switching transistor (TR) of a bit line selecting decoder lower than that of the TR of a peripheral circuit.
CONSTITUTION: The peripheral circuit is connected to a memory array 1 formed by connecting plural switching TRs Q2 in series through the bit line selecting decoder 2 which has plural shunt circuits selecting bit lines of the memory array, and the threshold voltage of the switching TR Q2 of the bit line selecting decoder 2 is set lower than the threshold voltage of the TR of the peripheral circuit. Their on-resistances are therefore reduced and even a mass storage device wherein the number of switching TRs Q2 of the bit line selecting decoder 2 increases is reduced in the load on a discharging path passed through the bit line selecting decoder 2 when a memory TR Q1 of the memory; array 1 is on. Consequently, the access time of even the mass storage device can be shortened.
COPYRIGHT: (C)1989,JPO&Japio
JP62-157065A 1987-06-23 semiconductor storage device Pending JPH011193A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62-157065A JPH011193A (en) 1987-06-23 semiconductor storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62-157065A JPH011193A (en) 1987-06-23 semiconductor storage device

Publications (2)

Publication Number Publication Date
JPS641193A true JPS641193A (en) 1989-01-05
JPH011193A JPH011193A (en) 1989-01-05

Family

ID=

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03230396A (en) * 1990-02-02 1991-10-14 Seikosha Co Ltd Address decoder for storage circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03230396A (en) * 1990-02-02 1991-10-14 Seikosha Co Ltd Address decoder for storage circuit

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