JPS6410747A - Transmission data confirmation circuit for controller - Google Patents

Transmission data confirmation circuit for controller

Info

Publication number
JPS6410747A
JPS6410747A JP62165685A JP16568587A JPS6410747A JP S6410747 A JPS6410747 A JP S6410747A JP 62165685 A JP62165685 A JP 62165685A JP 16568587 A JP16568587 A JP 16568587A JP S6410747 A JPS6410747 A JP S6410747A
Authority
JP
Japan
Prior art keywords
data
slave equipment
circuit
buffer
received
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62165685A
Other languages
Japanese (ja)
Inventor
Yoshiyuki Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62165685A priority Critical patent/JPS6410747A/en
Publication of JPS6410747A publication Critical patent/JPS6410747A/en
Pending legal-status Critical Current

Links

Landscapes

  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

PURPOSE:To confirm data transmitted to a slave equipment by collating data in a data buffer storing transmission data to the slave equipment with data received by the slave equipment. CONSTITUTION:The following are provided: an interface control circuit 1A to control an interface for the slave equipment, a data buffer 4 to store transmission data to the slave equipment, and a collation circuit 5 that collates an output data from the control circuit 1 received the data from the slave equipment which transmits received data in return, with the data from the data buffer 4. The collator circuit 5 collates the data from the control circuit 1A and that from the buffer 4, and outputs a collation error signal 103 to an internal processing circuit in the event of noncoincidence, so that the internal processing circuit processes to immediately terminate the data processing for data transmission to the slave equipment.
JP62165685A 1987-07-01 1987-07-01 Transmission data confirmation circuit for controller Pending JPS6410747A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62165685A JPS6410747A (en) 1987-07-01 1987-07-01 Transmission data confirmation circuit for controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62165685A JPS6410747A (en) 1987-07-01 1987-07-01 Transmission data confirmation circuit for controller

Publications (1)

Publication Number Publication Date
JPS6410747A true JPS6410747A (en) 1989-01-13

Family

ID=15817094

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62165685A Pending JPS6410747A (en) 1987-07-01 1987-07-01 Transmission data confirmation circuit for controller

Country Status (1)

Country Link
JP (1) JPS6410747A (en)

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