JPS6410085B2 - - Google Patents

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Publication number
JPS6410085B2
JPS6410085B2 JP57128120A JP12812082A JPS6410085B2 JP S6410085 B2 JPS6410085 B2 JP S6410085B2 JP 57128120 A JP57128120 A JP 57128120A JP 12812082 A JP12812082 A JP 12812082A JP S6410085 B2 JPS6410085 B2 JP S6410085B2
Authority
JP
Japan
Prior art keywords
oxide
mol
laminate
substrate
nonlinear resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57128120A
Other languages
Japanese (ja)
Other versions
JPS5918601A (en
Inventor
Kazuo Eda
Takayuki Eguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57128120A priority Critical patent/JPS5918601A/en
Publication of JPS5918601A publication Critical patent/JPS5918601A/en
Publication of JPS6410085B2 publication Critical patent/JPS6410085B2/ja
Granted legal-status Critical Current

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  • Thermistors And Varistors (AREA)
  • Compositions Of Oxide Ceramics (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

本発明は立上り電圧のきわめて低い電圧非直線
抵抗器と、その製造方法に関するものである。 近年、各種電気機器や電子機器に半導体素子が
広く用いられるようになつた。しかし、これら半
導体素子は一般にサージ(異常過電圧)に弱いも
のである。そこで、半導体素子をサージの発生す
る回路に使用する場合には耐圧の高いものを選ん
で使用するか、あるいはサージから保護するため
のサージ吸収器を用いるか、いずれかの方法がと
られている。通常、前者のサージ対策では十分で
なく、また価格も高くなるため、後者の方法がと
られている。 従来、これらのサージ保護素子として、ZnOに
Bi2O3,Co2O3,MnO2などの微量の添加物を加
えて焼結して得られるZnO電圧非直線抵抗器(以
下バリスタと云う)が知られている。ZnOバリス
タはサージに対して安定であり、優れたサージ保
護能力を示す。しかし、ZnOバリスタは焼結体の
粒界の非オーム性を利用しており、そのため低圧
用のものを得ることが困難である。すなわち、立
上り電圧は電極間に直列に挿入された粒界の数に
比例するため、立上り電圧の低いものを得ようと
すると、素子の厚みを薄くしなければならない。
しかし、ZnO粒子の粒径は数μmから10数μmのた
め、低圧用のものを得ようとすると、厚みを数
100μm以下にする必要があるが、機械的強度の関
係で、そのような薄いものを得ることはきわめて
困難である。したがつて、集積回路などの半導体
素子を保護するための適当なバリスタが得られて
いない。 これらの焼結形バリスタの欠点をなくすものと
して、ZnOを主成分とする基板に、酸化ビスマ
ス、酸化コバルト、希土類酸化物、アルカリ土類
酸化物などから成る膜をスパツタリングによつて
形成し、さらにZnO膜を同じくスパツタリングに
よつてその上に重ねたバリスタが報告されてい
る。これらのバリスタは、立上り電圧が低く、低
圧半導体のサージ保護に適している。しかし、こ
れらの素子のバリスタとしての性能を現わす定
数、電圧非直線指数、α(αはI=(V/C)〓で定
義される。但し、I:電流、V:電圧、C:定
数)はそれほど大きくない。 本発明はこれらの欠点を改善するもので、立上
り電圧が低く、αの大きな電圧非直線抵抗器を実
現したものである。以下、その実施例について詳
細に説明する。 図面は本発明による素子の基本的な構造を示し
たもので、1はZnOを主成分とする層、2は酸化
コバルトと他の金属酸化物を含む層、3は電極で
ある。このような構成とすることにより、ZnO主
成分層と酸化コバルトと他の金属酸化物を含む層
の界面にエネルギー障壁が形成され、このエネル
ギー障壁が非オーム性を示し、バリスタとしての
効果が得られる。エネルギー障壁は2つの界面に
それぞれ形成されるので、正負いずれの電圧に対
しても同じように動作することから、本構造の素
子は正負対称型の電圧非直線性を示す。 (実施例 1) ZnO粉体を、通常の成形方法によつて直径40
mm、厚さ20mmに成型し、SiCの型に入れて1200℃
で圧力200Kg/cm2を加えながら、空気中で10時間
加圧焼成した。得られた焼結体を厚み0.5mmの円
板に切断加工し、アルミナ微粉を用いて鏡面研磨
を施した後、有機溶剤で十分に洗浄した。次に、
第1表に示す酸化物組成粉体を有機バインダーお
よび有機溶剤に分散してペースト状とし、前記
ZnO鏡面基板上に塗布した。このようにして得た
2組の塗布膜付基板を、塗布膜同志が接し合うよ
うに重ねた。この積層基板を750℃の温度で400
Kg/cm2の圧力を加えながら空気中において1時間
加圧焼成し、その後素子両面のZnO基板上にAl
蒸着電極を設け、1mm角のチツプに切り出して電
気特性を測定した。第1表に、それぞれの素子に
ついて0.1〜1mA/cm2の領域における電圧非直
線指数αおよび立上り電圧(1mA/mm2の電流を
流した時の端子電圧)を示す。第1表の組成No.1
〜34は本発明の範囲内の例であり〓印を付したNo.
35〜38は比較例として示したものである。第1表
より、酸化コバルトをCo2O3の形に換算して、
99.96モル%〜45モル%、酸化ビスマスをBi2O3
形に換算して0.01〜54.97モル%、酸化プラセオ
ジウムをPr2O3の形に換算して0.01〜54.97モル
%、酸化バリウムをBaOの形に換算して0.01〜
54.97モル%およびマンガン、アンチモン、ホウ
素、ニツケル、リチウムのうち少なくとも1種以
上を、MnO2,Sb2O3,B2O3,NiO,Li2Oの形に
換算して、それぞれ0.01〜20.0モル%、0.01〜5.0
モル%、0.01〜10.0モル%、0.01〜20.0モル%、
0.001〜0.5モル%含む組成を用いることにより、
αが15以上、立上り電圧が8V以下の良好な低圧
バリスタの得られることがわかる。
The present invention relates to a voltage nonlinear resistor with extremely low rise voltage and a method for manufacturing the same. In recent years, semiconductor elements have come to be widely used in various electrical and electronic devices. However, these semiconductor devices are generally susceptible to surges (abnormal overvoltage). Therefore, when semiconductor devices are used in circuits that generate surges, either one of two methods is used: select one with a high withstand voltage, or use a surge absorber to protect against surges. . The latter method is usually used because the former method of surge protection is not sufficient and is also expensive. Conventionally, ZnO was used as these surge protection elements.
ZnO voltage nonlinear resistors (hereinafter referred to as varistors) are known, which are obtained by adding and sintering trace amounts of additives such as Bi 2 O 3 , Co 2 O 3 , and MnO 2 . ZnO varistors are stable against surges and exhibit excellent surge protection ability. However, ZnO varistors utilize the non-ohmic nature of grain boundaries in sintered bodies, which makes it difficult to obtain one for low pressure. That is, since the rising voltage is proportional to the number of grain boundaries inserted in series between the electrodes, in order to obtain a low rising voltage, the thickness of the element must be reduced.
However, since the particle size of ZnO particles is from several μm to 10-odd μm, when trying to obtain one for low pressure, the thickness must be increased several times.
Although it needs to be 100 μm or less, it is extremely difficult to obtain such a thin material due to mechanical strength. Therefore, suitable varistors for protecting semiconductor devices such as integrated circuits have not been available. In order to eliminate the drawbacks of these sintered varistors, a film made of bismuth oxide, cobalt oxide, rare earth oxide, alkaline earth oxide, etc. was formed by sputtering on a substrate mainly composed of ZnO, and A varistor with a ZnO film layered thereon by sputtering has also been reported. These varistors have a low rise voltage and are suitable for surge protection of low-voltage semiconductors. However, a constant that expresses the performance of these elements as a varistor, a voltage nonlinear index, α (α is defined as I = (V / C) 〓, where I: current, V: voltage, C: constant ) is not that large. The present invention improves these drawbacks by realizing a voltage nonlinear resistor with a low rise voltage and a large α. Examples thereof will be described in detail below. The drawing shows the basic structure of the device according to the present invention, in which 1 is a layer mainly composed of ZnO, 2 is a layer containing cobalt oxide and other metal oxides, and 3 is an electrode. With this configuration, an energy barrier is formed at the interface between the ZnO main component layer and the layer containing cobalt oxide and other metal oxides, and this energy barrier exhibits non-ohmic properties, resulting in an effect as a varistor. It will be done. Since the energy barrier is formed at each of the two interfaces, it operates in the same way for both positive and negative voltages, so the element with this structure exhibits positive-negative symmetrical voltage nonlinearity. (Example 1) ZnO powder was molded into a powder with a diameter of 40
mm, thickness 20mm, put in a SiC mold and heated to 1200℃
Pressure firing was performed in air for 10 hours while applying a pressure of 200 kg/cm 2 . The obtained sintered body was cut into a disk with a thickness of 0.5 mm, mirror-polished using fine alumina powder, and then thoroughly washed with an organic solvent. next,
The oxide composition powder shown in Table 1 is dispersed in an organic binder and an organic solvent to form a paste.
Coated on a ZnO mirror substrate. Two sets of substrates with coated films thus obtained were stacked so that the coated films were in contact with each other. This laminated board was heated to 400℃ at a temperature of 750℃.
Pressure firing was performed in air for 1 hour while applying a pressure of Kg/cm 2 , and then Al was deposited on the ZnO substrate on both sides of the device.
A vapor-deposited electrode was provided, the chip was cut into 1 mm square chips, and the electrical properties were measured. Table 1 shows the voltage nonlinearity index α and the rising voltage (terminal voltage when a current of 1 mA/mm 2 is applied) in the region of 0.1 to 1 mA/cm 2 for each element. Composition No. 1 in Table 1
-34 are examples within the scope of the present invention, and No. 34 is marked with 〓.
35 to 38 are shown as comparative examples. From Table 1, convert cobalt oxide into the form of Co 2 O 3 ,
99.96 mol% to 45 mol%, bismuth oxide 0.01 to 54.97 mol% in the form of Bi 2 O 3 , praseodymium oxide 0.01 to 54.97 mol % in the form of Pr 2 O 3 , barium oxide to BaO Convert to the form of 0.01~
54.97 mol% and at least one or more of manganese, antimony, boron, nickel, and lithium, each converted into the form of MnO 2 , Sb 2 O 3 , B 2 O 3 , NiO, and Li 2 O, from 0.01 to 20.0 Mol%, 0.01-5.0
Mol%, 0.01-10.0 Mol%, 0.01-20.0 Mol%,
By using a composition containing 0.001 to 0.5 mol%,
It can be seen that a good low-voltage varistor with α of 15 or more and a rise voltage of 8V or less can be obtained.

【表】【table】

【表】 *印は比較例
(実施例 2) 実施例1で用いた組成のうち、第1表のNo.28に
示す組成を用いて、製造条件の効果を調べた。第
2表は積層して加圧焼成する時の焼成温度と電気
特性の関係を示したものであり、500℃から950℃
の焼成温度で良好な特性が得られている。なお、
500℃未満で焼成した場合、積層部の接着強度が
弱く、実用的なものが得られなかつた。
[Table] * indicates a comparative example (Example 2) Among the compositions used in Example 1, the composition shown in No. 28 of Table 1 was used to examine the effect of manufacturing conditions. Table 2 shows the relationship between the firing temperature and electrical properties when laminating and pressurizing firing, and shows the relationship between the firing temperature and electrical characteristics when laminated and pressure fired.
Good properties were obtained at a firing temperature of . In addition,
When firing at a temperature lower than 500°C, the adhesive strength of the laminated portion was weak and a practical product could not be obtained.

【表】 本実施例では400Kg/cm2の圧力で積層加圧焼成
しているが、その時の圧力の効果について更に検
討してみた。その結果、50Kg/cm2未満の圧力で
は、焼成後取り出した時、ZnO基板と、酸化コバ
ルトと他の金属酸化物を含む層の接着強度の十分
なものが得られなかつた。一方、1000Kg/cm2より
大きい圧力で焼成すると、ZnO基板にひび割れの
生ずるものが多く、適当でなかつた。50Kg/cm2
1000Kg/cm2の圧力で焼成されたものは、ほぼ同じ
電気特性を示し、接着強度、ひび割れの点でも問
題がなかつた。以上の結果から積層加圧圧力とし
て50〜1000Kg/cm2が適当であることがわかつた。 次に、積層加圧焼成の焼成時間の効果について
検討した。その結果、焼成温度で10分以上保て
ば、とくに電気特性に大きな変化の現われないこ
とがわかつた。 次に、基板として用いるZnO基板の焼成条件に
ついて検討した。焼成圧力を0〜1500Kg/cm2、焼
成温度を700℃〜1500℃の間で変化させ、その効
果を調べた。その結果、焼成時の圧力が50Kg/cm2
未満であると研磨後のZnO基板表面に気孔が多
く、そのため特性のきわめて不安定なものしか得
られなかつた。50Kg/cm2以上の圧力をかけて焼成
した場合には、いずれの圧力においても良好な
ZnO基板が得られた。圧力はあまり高くすると装
置が高価になるなど他の問題も生ずるので、特に
著しい効果がない場合にはあまり圧力を上げても
意味がない。ZnO基板の焼成圧力としては50〜
1500Kg/cm2が適当であつた。 焼成温度は800℃未満の場合、焼結が不十分で
あり、1400℃より高温にするとZnOの粒成長が進
みすぎて、機械的強度が弱くなるなどの問題を生
じた。したがつて800℃〜1400℃が適当な焼成温
度である。また、焼成時間は1時間以上あれば十
分緻密なZnO基板の得られることがわかつた。 本実施例では、酸化コバルトと他の金属酸化物
を含む1つの層を2つのZnO基板でサンドイツチ
状に積層しているが、さらにこの上にもう1つの
酸化コバルトと他の金属酸化物を含む層を設け、
さらにZnO基板を積層してやれば、実施例の初め
に述べた如く、本発明のバリスタ作用が酸化コバ
ルトと他の金属酸化物を含む層とZnO基板の界面
で生じることから考えて、実施例1のバリスタを
直列に2ケ接続したのと同様の効果が得られるこ
とは明らかであり、このように積層数を増すこと
によつて、さらに高電圧のバリスタを得ることが
できる。 なお、本実施例ではZnO基板を用いたが、ZnO
基板の比抵抗を制御する各種の添加物、たとえば
3価元素であるアルミニウムやガリウム、また1
価元素であるリチウムなどを加えて、特性を種々
に変化させることも可能であり、したがつて本発
明は純粋なZnO基板に限定されるものではない。 また、酸化コバルトと他の金属酸化物を含む層
を形成する場合、本実施例ではそれぞれCo2O3
Pr2O3,MnO2などを用いたが、CoO,Co3O4
MnOなどを用いても同様の結果が得られた。し
たがつて本発明は本実施例に示した酸化物にのみ
限定されるものではない。 以上述べた如く、本発明は材料組成および法の
巧みな組み合せにより初めて得られたものであ
り、本発明より得られる素子は、半導体素子を用
いた電子機器の信頼性を向上させるのに有用なも
のなのである。
[Table] In this example, lamination and pressure firing was carried out at a pressure of 400 Kg/cm 2 , but the effect of the pressure at that time was further investigated. As a result, when the pressure was less than 50 Kg/cm 2 , sufficient adhesion strength between the ZnO substrate and the layer containing cobalt oxide and other metal oxides could not be obtained when taken out after firing. On the other hand, firing at a pressure higher than 1000 Kg/cm 2 was not suitable as many cracks appeared in the ZnO substrate. 50Kg/ cm2 ~
Those fired at a pressure of 1000 kg/cm 2 showed almost the same electrical properties and had no problems in terms of adhesive strength or cracking. From the above results, it was found that a lamination pressure of 50 to 1000 Kg/cm 2 is appropriate. Next, we investigated the effect of firing time in laminated pressure firing. As a result, it was found that if the material was kept at the firing temperature for 10 minutes or more, there were no significant changes in the electrical properties. Next, we investigated the firing conditions for the ZnO substrate used as the substrate. The firing pressure was varied between 0 and 1500 Kg/cm 2 and the firing temperature was varied between 700°C and 1500°C, and the effects thereof were investigated. As a result, the pressure during firing was 50Kg/cm 2
If it is less than that, there will be many pores on the surface of the ZnO substrate after polishing, and therefore only those with extremely unstable characteristics can be obtained. When firing at a pressure of 50Kg/cm2 or more , good results are obtained at any pressure.
A ZnO substrate was obtained. If the pressure is too high, other problems will occur, such as the equipment becoming expensive, so there is no point in increasing the pressure too much, especially if there is no significant effect. The firing pressure for ZnO substrate is 50~
1500Kg/cm 2 was appropriate. When the firing temperature was less than 800°C, sintering was insufficient, and when the firing temperature was higher than 1400°C, ZnO grain growth progressed too much, resulting in problems such as weakening of mechanical strength. Therefore, a suitable firing temperature is 800°C to 1400°C. It was also found that a sufficiently dense ZnO substrate could be obtained if the firing time was one hour or more. In this example, one layer containing cobalt oxide and other metal oxides is stacked on two ZnO substrates in a sandwich pattern, and on top of this, another layer containing cobalt oxide and other metal oxides is stacked on two ZnO substrates. layer,
Furthermore, if ZnO substrates are laminated, the varistor effect of the present invention occurs at the interface between the layer containing cobalt oxide and other metal oxides and the ZnO substrate, as described at the beginning of the example, and therefore, the effect of Example 1 can be improved. It is clear that the same effect as when two varistors are connected in series can be obtained, and by increasing the number of laminated layers in this way, a higher voltage varistor can be obtained. Note that although a ZnO substrate was used in this example, ZnO
Various additives that control the specific resistance of the substrate, such as trivalent elements such as aluminum and gallium, and
It is also possible to change the properties in various ways by adding a valence element such as lithium, so the present invention is not limited to pure ZnO substrates. In addition, when forming a layer containing cobalt oxide and other metal oxides, in this example, Co 2 O 3 and Co 2 O 3 , respectively
Pr 2 O 3 , MnO 2 , etc. were used, but CoO, Co 3 O 4 ,
Similar results were obtained using MnO and the like. Therefore, the present invention is not limited only to the oxides shown in this example. As described above, the present invention was obtained for the first time through a skillful combination of material composition and method, and the device obtained from the present invention is useful for improving the reliability of electronic devices using semiconductor devices. It is a thing.

【図面の簡単な説明】[Brief explanation of drawings]

図面は本発明の一実施例の構造を示す断面図で
ある。 1……ZnO主成分層、2……酸化コバルトとそ
の他の金属酸化物を含む層、3……電極。
The drawing is a sectional view showing the structure of an embodiment of the present invention. 1... ZnO main component layer, 2... Layer containing cobalt oxide and other metal oxides, 3... Electrode.

Claims (1)

【特許請求の範囲】 1 コバルトを酸化コバルト(Co2O3)の形に換
算して45〜99.96モル%およびビスマスを酸化ビ
スマス(Bi2O3)の形に換算して0.01〜54.97モル
%、プラセオジウムを酸化プラセオジウム
(Pr2O3)の形に換算して0.01〜54.97モル%、バ
リウムを酸化バリウム(BaO)の形に換算して
0.01〜54.97モル%、およびマンガン、アンチモ
ン、ホウ素、ニツケル、リチウムのうち少なくと
も1種以上を、MnO2,Sb2O3,B2O3,NiO,
Li2Oの形に換算して、それぞれ0.01〜20.0モル
%、0.01〜5.0モル%、0.01〜10.0モル%、0.01〜
20.0モル%、0.001〜0.5モル%含む領域を、酸化
亜鉛を主成分とする2つの領域によつてサンドイ
ツチ状にはさみ、これを一組以上積み重ねて積層
体を構成し、この積層体の表裏両主面に電極を設
けたことを特徴とする電圧非直線抵抗器。 2 酸化亜鉛を主成分とする領域が多結晶焼結体
であることを特徴とする特許請求の範囲第1項記
載の電圧非直線抵抗器。 3 少なくとも2枚の酸化亜鉛を主成分とする基
板の主面上に、それぞれ酸化コバルト、酸化ビス
マス、酸化プラセオジウム、酸化バリウムの全て
と、酸化マンガン、酸化アンチモン、酸化ホウ
素、酸化ニツケル、酸化リチウムのうち1種以上
を含む膜を形成し、前記基板と前記膜が交互に配
置され、かつ最外層が前記酸化亜鉛を主成分とす
る基板となるように積層した後、圧力を加えなが
ら熱処理を行つて接着し、得られた積層体の表裏
両主面に電極を形成することを特徴とする電圧非
直線抵抗器の製造方法。 4 基板として、酸化亜鉛を主成分とする粉末を
成形して800〜1400℃の空気中で50〜1500Kg/cm2
の圧力を加えながら焼成して得られた焼結体を用
いることを特徴とする特許請求の範囲第3項記載
の電圧非直線抵抗器の製造方法。 5 50〜1000Kg/cm2の圧力を加えながら、500〜
950℃で熱処理を行つて積層体を接着することを
特徴とする特許請求の範囲第3項記載の電圧非直
線抵抗器の製造方法。
[Claims] 1. 45 to 99.96 mol% of cobalt in the form of cobalt oxide (Co 2 O 3 ) and 0.01 to 54.97 mol % of bismuth in the form of bismuth oxide (Bi 2 O 3 ). , 0.01 to 54.97 mol% of praseodymium in the form of praseodymium oxide (Pr 2 O 3 ), and barium in the form of barium oxide (BaO).
0.01 to 54.97 mol%, and at least one or more of manganese, antimony, boron, nickel, and lithium, MnO 2 , Sb 2 O 3 , B 2 O 3 , NiO,
0.01 to 20.0 mol%, 0.01 to 5.0 mol%, 0.01 to 10.0 mol%, and 0.01 to 0.01 to 20.0 mol%, respectively, in terms of Li2O form.
A region containing 20.0 mol% and 0.001 to 0.5 mol% is sandwiched between two regions containing zinc oxide as the main component in a sandwich-like pattern, and one or more sets of these are stacked to form a laminate, and both the front and back sides of this laminate are stacked. A voltage nonlinear resistor characterized by having electrodes on its main surface. 2. The voltage nonlinear resistor according to claim 1, wherein the region containing zinc oxide as a main component is a polycrystalline sintered body. 3. All of cobalt oxide, bismuth oxide, praseodymium oxide, and barium oxide, and manganese oxide, antimony oxide, boron oxide, nickel oxide, and lithium oxide are respectively deposited on the main surfaces of at least two zinc oxide-based substrates. After forming a film containing one or more of the above, and laminating the substrate and the film so that the substrate and the film are arranged alternately and the outermost layer is the substrate containing the zinc oxide as a main component, heat treatment is performed while applying pressure. 1. A method for manufacturing a voltage nonlinear resistor, comprising: bonding the laminate with a laminate, and forming electrodes on both the front and back principal surfaces of the obtained laminate. 4. As a substrate, powder containing zinc oxide as the main component is molded and heated to 50 to 1500 kg/cm 2 in air at 800 to 1400°C.
4. The method of manufacturing a voltage nonlinear resistor according to claim 3, characterized in that a sintered body obtained by firing while applying pressure is used. 5 While applying a pressure of 50 to 1000Kg/ cm2 ,
4. The method of manufacturing a voltage nonlinear resistor according to claim 3, wherein the laminate is bonded by heat treatment at 950°C.
JP57128120A 1982-07-21 1982-07-21 Voltage nonlinear resistor and method of producing same Granted JPS5918601A (en)

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JP57128120A JPS5918601A (en) 1982-07-21 1982-07-21 Voltage nonlinear resistor and method of producing same

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Application Number Priority Date Filing Date Title
JP57128120A JPS5918601A (en) 1982-07-21 1982-07-21 Voltage nonlinear resistor and method of producing same

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JPS5918601A JPS5918601A (en) 1984-01-31
JPS6410085B2 true JPS6410085B2 (en) 1989-02-21

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CN116655369B (en) * 2023-06-19 2024-03-22 陕西科技大学 Three-layer-structure pressure-sensitive ceramic only comprising single double Schottky grain boundary barriers, and preparation method and application thereof

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